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ENG3380 Computer Organization

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Presentation on theme: "ENG3380 Computer Organization"— Presentation transcript:

1 ENG3380 Computer Organization
General Information Handout Winter 2018, January 8th

2 Ziad Abuowaimer Office, Email, Phone Research Interests
Office: Thorn 2319, Web: Office Hours: Wednesdays: 12:00 –13:00 MASc, PhD, Research Interests Computer Architecture VLSI Physical Design Automation (CAD Tools) Reconfigurable Computing Systems Embedded Systems ENG3380 Winter 2018

3 Outline Info about Staff (TAs, LabTech) Lecture and Lab Schedule.
Course Text and References. Course contents, Tentative Schedule. Assignments, Labs, Exams. Evaluation Important Information ENG3380 Winter 2018

4 Lab Instructor Thornbrough Building Room 2308, ext 53873
ENG3380 Winter 2018

5 Teaching Assistant TA: xxxx. Office: Rich 3529 Email: @uoguelph.ca
ENG3380 Winter 2018

6 Lecture & Lab Schedule Lectures LABS Tutorials
13:30 – 14:20, MCKN 115 (Mon, Wed, Fri) LABS Fridays: 9:30 – 11:20 AM (RICH1351) Tutorials None ENG3380 Winter 2018

7 Text Book and References
Text Book: “Computer Organization and Design: The hardware/software Interface”, 5th Edition, by D. Patterson and J. Hennessy, Morgan and Kaufmann, 2014. References “VHDL for Engineers” by Short, 2008. “Computer Organization and Architecture”, 10th Edition by W. Stallings, Pearson, 2014. “Computer Systems Organization and Architecture”, by J. Carpinelli, Addison Wesley. “Computer Organization and Embedded Systems”, 6th Edition, by Hamacher, McGraw Hill. ENG3380 Winter 2018

8 Resources & Communication
Course Link Communications , listserv Eng3380 Web Page (Announcement) CourseLink (ENG3380) ENG3380 Winter 2018

9 Course Objectives This course provides detailed examination of modern computer organization and techniques for microprocessor architecture design. Topics Include: CPU Design, Instruction Set Design, Complex Arithmetic Circuits, Data Path Design, Internal bus structure, Control sequence design, micro-programmed control Instruction level parallelism: Pipelining Memory Organization, Cache Memory … Advanced Topics in VHDL ENG3380 Winter 2018

10 Relationship to Other Courses
ENG364 Micro Comp Interfacing You will learn how to attach Several modules to an MCU Such as memory, LCDs, LEDs 7-Seg, Keyboards ENG4540 Advanced Computer Architecutre After learning Computer Organization, you will learn More Advanced Concepts Multi-Processing, GPUs, .. ENG3050 Reconfigurable Computing How to design Hardware Accelerators And Understand FPGAs and CAD Flows Real Time Systems & Operating Sytstems Will help you with these Courses since you will Attempt to design complete Embedded Systems. ENG3380 Winter 2018

11 Tentative Schedule Week #1: Introduction and Performance Evaluation
Week #2: Simple Computer Organization, Instruction Set Week #3: Cont .. Instruction Set Architecture Week #4,#5: CPU Design (Micro-Programmed Control) Week #6, #7: CPU Design (Data Path) Week #8: Arithmetic Circuits Week #9, #10: Pipelining Week #11: Memory Hierarchy (Cache) Week #12: Memory Hierarchy (Virtual Memory) ENG3380 Winter 2018

12 Assignments Assignment#1, (Week#3) Performance
Assignment#2, (Week#5) CPU Design Assignment#3, (Week#7) Pipelining Assignment#4, (Week #9) Cache Design ENG3380 Winter 2018

13 Labs: Reports, Preparation ..
Lab#1, Week#1: Time Multiplexed 7-Segment Display Lab#2, Week#2: Register Files & Memory in VHDL Lab#3, Week#3: ALU Design Lab#4, Week#4: Busses and Peripheral Devices Lab#5, Week#5: Micro-Programmed Control Unit Design Lab#6, Week#6: ALU + RF + Memory + Control Unit We will introduce new concepts in VHDL beyond what you have learnt in ENG2410 ENG3380 Winter 2018

14 LABS Labs are an integral part of the course. The objectives of the labs are: Understand and assimilate lecture material Give practical experience using small scale integrated circuits and FPGAs Teach you Hardware Descriptive Language To give you hands on experience with CAD tools for digital hardware development. ENG3380 Winter 2018

15 Project .. You are required to design a complete CPU
Data Path .. Register File, ALU, … Control Unit .. Microprogrammed Control vs. Wired Control You will be using VHDL to complete your design You will be using the NEXYS-3 FPGA Board to map your design onto the FPGA ENG3380 Winter 2018

16 Exam Schedule Midterm Final Exam
Week#7, Saturday, March 3rd, 11:30 in (TBA) Final Exam Week#14, (TBA) ENG3380 Winter 2018

17 Evaluation Topic Weight Details Assignments 5% 4-5 Assignments
Labs & Project 45% (20%+25%) 6 Labs + Project Report Midterm 15% Week 7 Final Exam 35% Week 14 ENG3380 Winter 2018

18 Important Issues It is important to remember that the midterm and final exam will be based on the assignment problems, so it is in your best interest to seriously attempt all questions alone. No Makeup exam for Midterm. If you have a doctor note (final exam out of 50%) In order to pass the course, you must pass the lab (project) and exam course portion. Students must obtain a grade of 50% or higher on the exam portion of the course. If a laboratory is missed due to illness or other reason, arrangements must be made with the teaching assistant to complete a make-up lab. ENG3380 Winter 2018

19 Academic Misconduct The policy for this course is zero tolerance for any form of plagiarism and academic misconduct. All cases will be dealt by the Dean of the College. Please refer to the regulation outlined in the student handbook and course outline regarding academic misconduct. ENG3380 Winter 2018

20 Advice Attend all Lectures! Attend Labs! Attempt all assignments
Make use of your Teaching Assistant Put sufficient hours in Project Don’t leave things to the last minute! Manage your time!!!!!!!!!! ENG3380 Winter 2018

21 Questions? ENG3380 Winter 2018


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