ECP2036 Microprocessor and Interfacing Registers Control & Status Registers Program Counter User-Visible Registers Instruction Register... General-Purpose Reg. Address Register Data Register Flag Register...

Control & Status Registers Program Counter ECP2036 Microprocessor and Interfacing User-Visible Registers Instruction Register... General-Purpose Reg. Address Register Data Register... To hold the memory address of the next instruction to be executed Default value at power on/reset: PC = 0000H or FFFFH (or other address predetermined by the manufacturer)

Control & Status Registers Program Counter ECP2036 Microprocessor and Interfacing User-Visible Registers Instruction Register... General-Purpose Reg. Address Register Data Register Flag Register... To hold the instruction fetched from external memory

Control & Status Registers Program Counter ECP2036 Microprocessor and Interfacing User-Visible Registers Instruction Register... General-Purpose Reg. Address Register Data Register Flag Register... Can be assigned to a variety of functions by programmer

Control & Status Registers Program Counter ECP2036 Microprocessor and Interfacing User-Visible Registers Instruction Register... General-Purpose Reg. Address Register Data Register Flag Register... To hold the address of next memory location to be addressed

Program Counter ECP2036 Microprocessor and Interfacing User-Visible Registers Instruction Register... General-Purpose Reg. Address Register Data Register Flag Register... To hold the data fetched from memory

Control & Status Registers ECP2036 Microprocessor and Interfacing Instruction Register... General-Purpose Reg. Address Register Data Register Flag Register... Condition-code register that contains a number of flag bits. Each flag bit is either set (“1”) or reset (“0”) by the result of an arithmetic or logical instruction that has just been executed

Memory Memory Location-1 Memory Location-2 Memory Address-1  Memory Address-2  Memory Location-n Memory Address-n  word = 8-bit data (for 8051) ECP2036 Microprocessor and Interfacing

Bus System (I) Address Bus These are the wires that carry the CPU generated address signals out to memory and to I/O devices. The address signals only travel outwards from the CPU (unidirectional). The number of address lines that a microprocessor has determines the size of the memory space that it can access. ECP2036 Microprocessor and Interfacing

Memory Size ECP2036 Microprocessor and Interfacing

Data Bus These are the data signals that travel out of and into the  P (bi-directional). The number of wires in the data bus depends on the word size that the  P operates with. An 8-bit  P will have a data bus consisting of 8 wires and a 32-bit  P will have a data bus with 32 wires. Bus System (II) ECP2036 Microprocessor and Interfacing

Control Bus The control bus consists of wires, some of which carry signals from the CPU to external devices, while others carry signals from external devices to the CPU. The number of wires present in the control bus varies from one  P to another. Examples of control bus signals are READ/, WAIT, READY, and HOLD. Bus System (III) ECP2036 Microprocessor and Interfacing

von Neumann Architecture Main Memory ALU CU I/O ECP2036 Microprocessor and Interfacing

Basic Instruction Cycle Execute Instruction Start Fetch Instruction End Fetch Cycle Execute Cycle PC = 0000H PC = PC + n ECP2036 Microprocessor and Interfacing

Memory Read Operation - Step 1 ECP2036 Microprocessor and Interfacing CPU Memory Address bus Data bus CPU places address (XXXX) of the memory location on the address bus Memory request Read The CPU sends out the control signals Memory Request and Read to indicate that it wants to read from memory

Memory Read Operation - Step 2 ECP2036 Microprocessor and Interfacing CPU Memory Address bus Data bus Memory request Read Accessed location at XXXX Memory places data from the accessed location onto the data bus

Memory Read Operation - Step 3 ECP2036 Microprocessor and Interfacing CPU Memory Address bus Data bus Memory request Read Memory request Read The CPU removes the Memory Request and Read signals CPU latches the data into a register Register

Memory Write Operation - Step 1 ECP2036 Microprocessor and Interfacing CPU Memory Address bus Data bus CPU places address (YYYY) of the memory location on the address bus The CPU sends out a Memory Request control signal to indicate that it wants to perform a memory operation Memory request

Memory Write Operation - Step 2 ECP2036 Microprocessor and Interfacing CPU Memory Address bus Data bus Memory request CPU places the data from a register onto the data bus Register The CPU sends out a Write control signal to indicate that valid data is available on the data bus Write

Memory Write Operation - Step 3 ECP2036 Microprocessor and Interfacing CPU Memory Address bus Data bus Memory request Memory copies the data bus into the accessed location Register Write Accessed location at YYYY The CPU removes the Write signal to complete the memory write operation Memory request Write

Assembly Language Program An assembly language program is a program written using labels and mnemonics, in which each statement corresponds to a machine instruction. ; A test program ORG 0000H MOV A, #01H LOOP:RLA MOVP1, A; output to port 1 JMPLOOP END ECP2036 Microprocessor and Interfacing

Assembling A Source Program asm51 program.srcprogram.obj program.lst An assembler is a program that translate an assembly language program into a machine language program. ECP2036 Microprocessor and Interfacing

Linking Object Files RL51 program program.m51 A linker/locator is a program that combines relocatable object programs (modules) and produces an absolute object program that is executable by a computer. File3.obj File2.obj File1.obj ECP2036 Microprocessor and Interfacing

BIN to HEX conversion OH program.hexprogram.bin Download to 8051 ECP2036 Microprocessor and Interfacing