1. The 8085 Microprocessor Architecture

2. What 8085 meant for? 80 - year of invention 8 - 8 bit processor 5 - uses +5V for power

3. 3 The 8-bit 8085 CPU (or MPU – Micro Processing Unit) communicates with the other units using a 16-bit address bus, an 8-bit data bus and a control bus.

4. The 8085 and Its Busses The 8085 is an 8-bit general purpose microprocessor It has 40 pins and uses +5V for power. It can run at a maximum frequency of 3 MHz. The pins on the chip can be grouped into 6 groups: Address Bus. Data Bus. Control and Status Signals. Power supply and frequency. Externally Initiated Signals. Serial I/O ports.

5. 5 Processor System Architecture The typical processor system consists of:  CPU (central processing unit)  ALU (arithmetic-logic unit)  Control Logic  Registers, etc…  Memory  Input / Output interfaces Interconnections between these units:  Address Bus  Data Bus  Control Bus

6. 6 Bus and CPU Bus: A shared group of wires used for communicating signals among devices address bus: the device and the location within the device that is being accessed data bus: the data value being communicated control bus: describes the action on the address and data buses CPU: Core of the processor, where instructions are executed High-level language: a = b + c Assembly language: add r1 r2 r3 Machine language: 0001001010111010101

7. 7 8085 Microprocessor Architecture Now we will examine these components more closely by using the Intel 8085 microprocessor architecture.

8. 8 8085 Functional Block Diagram

10. ALU AND SPECIAL PURPOSE REGISTERS ALU which performs arithmetic and logic operations like Increment Decrement Compare Add, subtract, ETC.,

11. The ALU In addition to the arithmetic & logic circuits, the ALU includes the accumulator, which is part of every arithmetic & logic operation. Also, the ALU includes a temporary register used for holding data temporarily during the execution of the operation. This temporary register is not accessible by the programmer.

12. 12 The 8085: CPU Internal Structure Accumulator  Single 8-bit register that is part of the ALU and it holds the first operand for and ALU operation.  Used for arithmetic / logic operations – the result is always stored in the accumulator.

13. The Flags register There is also the flags register whose bits are affected by the arithmetic & logic operations. S-sign flag  The sign flag is set if bit D7 of the accumulator is set after an arithmetic or logic operation. Z-zero flag  Set if the result of the ALU operation is 0. Otherwise is reset. This flag is affected by operations on the accumulator as well as other registers. (DCR B). AC-Auxiliary Carry  This flag is set when a carry is generated from bit D3 and passed to D4. This flag is used only internally for BCD operations. (Section 10.5 describes BCD addition). P-Parity flag  After an ALU operation if the result has an even # of 1’s the p-flag is set. Otherwise it is cleared. So, the flag can be used to indicate even parity. CY-carry flag  This is set when overflow occurs in an operation. www.yesnarayanan.blogspot.com S D7 Z D6D5 AC D4D3 P D2D1 C D0

14. General purpose registers Six general purpose 8-bit registers: B, C, D, E, H, L They can also be combined as register pairs to Perform 16-bit operations: BC, DE, HL Registers are programmable (data load, move, etc.) When we use a single byte registers the codes used to represents them are as follows Name of the register codeName of the register code BCDBCD 000 001 010 EHLEHL 011 100 101

15. similarly the codes for register in pairs are as follows Name of the register code BC DE HL 00 01 10

16. Power supply and ground: Signals which aids in supplying power and generating frequency are associated with this type. Pins like Vcc and Vss are classified under this type.

17. Address signals: Signals associated with the lower order address bus and time multiplexed higher order address bus comes under this type of signals. Data Signals: Signals associated with data bus comes under this type. Control and Status Signals: Signals which are associated with timing and control unit such HOLD, RW’, WR’ etc. comes under this type of signals.

18. Interrupt Signals: We know that signals like TRAP, RST 5.5 etc. are interrupt signals. Such signals come under this category.interrupt signals Serial I/O signals: These signals are used for giving serial input and output data. Signals like SID, SOD come under this category. Acknowledgement Signals: Signals like INTA’, HLDA acts as acknowledgement signal for 8085 microprocessor.

19. ALE: Address Latch Enable: ALE helps in demultiplexing the lower order address and data bus. This signal goes high during the first clock cycle and enables the lower order address bits. The lower order address bus is added to memory or any external latch.

20. IO/M’: Consider we have an address to be processed. But how do the processors know whether the address is for memory or I/O functions? For this purpose a status signal called IO/M’ is used. This distinguishes whether the address is for memory or IO. When this pin goes high, the address is for an I/O device. While the pin goes low, the address is assigned for the memory. S0-S1: S0 and S1 are status signals which provides different status and functions depending on their status.

21. RD’: This is an active low signal. That is, an operation is performed when the signal goes low. This signal is used to control READ operation of the microprocessor. When this pin goes low the microprocessor reads the data from memory or I/O device. WR’: WR’ is also an active low signal which controls the write operations of the microprocessor. When this pin goes low, the data is written to the memory or I/O device.

22. READY: READY is used by the microprocessor to check whether a peripheral is ready to accept or transfer data. A peripheral may be a LCD display or analog to digital converter or any other. These peripherals are connected to microprocessor using the READY pin. If READY is high then the periphery is ready for data transfer. If not the microprocessor waits until READY goes high. HOLD: This indicates if any other device is requesting the use of address and data bus. Consider two peripheral devices. One is the LCD and the other Analog to Digital converter. Suppose if analog to digital converter is using the address and data bus and if LCD requests the use of address and data bus by giving HOLD signal, then the microprocessor transfers the control to the LCD as soon as the current cycle is over. After the LCD process is over, the control is transferred back to analog and digital converter. HLDA: HLDA is the acknowledgment signal for HOLD. It indicates whether the HOLD signal is received or not. After the execution of HOLD request, HLDA goes low.

23. INTR: These are the signals which stops the operation of microprocessor and divert a control to more important tasks. INTA’: Whenever the microprocessor receives interrupt signal. It has to be acknowledged. This acknowledgement is done by INTA’. So whenever the interrupt is received INTA’ goes high.

24. RST 5.5, 6.5, 7.5: These are nothing but the restart interrupts. They insert an internal restart function automatically. All the above mentioned interrupts are maskable interrupts. That is, they can be enabled or disabled using programs.

25. TRAP: Among the interrupts of 8085 microprocessor, TRAP is the only non-maskable interrupt. It cannot be enabled or disabled using a program. It has the highest priority among the interrupts. PRIORITY ORDER (From highest to lowest) TRAP RST 7.5 RST 6.5 RST 5.5

26. RESET IN’: This pin resets the program counter to 0 and resets interrupt enable and HLDA flip-flops. The CPU is held in reset condition until this pin is high. However the flags and registers won’t get affected except for instruction register. RESET OUT: This pin indicates that the CPU has been reset by RESET IN’. X1 X2: These are the terminals which are connected to external oscillator to produce the necessary and suitable clock operation.

27. CLK: Sometimes it is necessary for generating clock outputs from microprocessors so that they can be used for other peripherals or other digital IC’s. This is provided by CLK pin. Its frequency is always same as the frequency at which the microprocessor operates. SID: This pin provides serial input data. The serial data on this pin is loaded into the seventh bit of the accumulator when RIM instruction is executed. RIM stands for READ INTERRUPT MASK, which checks whether the interrupt is masked or not. SOD: This pin provides the serial output data. The serial data on this pin delivers its output to the seventh bit of the accumulator when SIM instruction is executed.

28. The Control and Status Signals There are 4 main control and status signals. These are: ALE: Address Latch Enable. This signal is a pulse that become 1 when the AD0 – AD7 lines have an address on them. It becomes 0 after that. This signal can be used to enable a latch to save the address bits from the AD lines. RD: Read. Active low. WR: Write. Active low. IO/M: This signal specifies whether the operation is a memory operation (IO/M=0) or an I/O operation (IO/M=1). S1 and S0 : Status signals to specify the kind of operation being performed.Usually un-used in small systems.

29. The Address and Data Busses The address bus has 8 signal lines A8 – A15 which are unidirectional. The other 8 address bits are multiplexed (time shared) with the 8 data bits. So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7 and D0 – D7 at the same time. During the execution of the instruction, these lines carry the address bits during the early part, then during the late parts of the execution, they carry the 8 data bits. In order to separate the address from the data, we can use a latch to save the value before the function of the bits changes.

30. Frequency Control Signals There are 3 important pins in the frequency control group. X0 and X1 are the inputs from the crystal or clock generating circuit. The frequency is internally divided by 2.  So, to run the microprocessor at 3 MHz, a clock running at 6 MHz should be connected to the X0 and X1 pins. CLK (OUT): An output clock pin to drive the clock of the rest of the system.