Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 1 Introduction to Electronic Circuit Design.

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Presentation transcript:

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 1 Introduction to Electronic Circuit Design Richard R. Spencer Mohammed S. Ghausi

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 2 Figure 14-1 Node voltage levels showing allowed and forbidden ranges of values.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 3

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 4 Figure 14-2 (a) Inverter, or NOT gate. (b) Truth table. Figure 14-3 (a) OR gate. (b) Truth table. Figure 14-4 (a) AND gate. (b) Truth table.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 5 Figure 14-6 (a) NOR gate constructed using an OR gate and an inverter, (b) the NOR schematic symbol, and (c) truth table.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 6 Figure 14-7 (a) NAND gate. (b) Truth table.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 7 Figure (a) An SR flip-flop, (b) a table describing the circuit’s function, and (c) the schematic symbol.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 8 Figure A clocked SR flip-flop.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 9 Figure (a) A JK flip-flop made using an SR flip-flop. (b) The schematic symbol for a JK flip-flop and (c) the function table. (The flip-flop only changes state when the clock is high.)

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 10 Figure A master-slave JK flip-flop.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 11 Figure (a) An edge-triggered JK flip-flop and (b) the schematic symbol for it.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 12 Figure (a) A D flip-flop, (b) its schematic symbol, and (c) the function table.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 13 Figure A 4-bit shift register made using D flip-flops.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 14, slide 14 Figure (a) A 3-bit synchronous binary counter and (b) its function table.