The NAND gate as a universal gate Logic function NAND gate only AA A B A.BA.B A B A+B A B A B A B A A A B A.BA.B B A A B A B A B.

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Presentation transcript:

The NAND gate as a universal gate Logic function NAND gate only AA A B A.BA.B A B A+B A B A B A B A A A B A.BA.B B A A B A B A B

Gates with more than two inputs A B A. B. C=Y C A B Y C ABCDABCD Y A B Y C D A B A+B+C+D=Y C D A B Y C D A B Y C C B A A+B+C=Y

Gates with more than two inputs (cont.). = A B C D Y A B Y C D = =

NAND,NOR gates use to implement any Boolean operation

Gate conversion using inverter.

Boolean theorems (16) (x + y) = x. y (17) (x. y) = x + y DeMORGAN ’ S THEOREMS

COMBINATORIAL LOGIC CIRCUITS ALGEBRAIC SIMPLIFICATION Example 1

EXAMPLE

Topdown design 1 Block diagram 2 Truth table 3 Boolean function 4 Simplify 5 Schematic 6 Test I/O Seq

EXAMPLE Converting circuits to NAND.

Example Sum-of-products NAND-NAND circuit

Example products -of- Sum NOR-NOR circuit

KANAUGH MAP METHOD KANAUGH MAP AND TRUTH TABLE

KANAUGH MAP

Example of looping pairs

Example of looping groups of four.

EXCLUSIVE-OR & EXCLUSIVE-NOR CIRCIUTS

Design a logic circuit, using x 1,x 0,y 1,y 0 inputs, whose output will be HIGH only when the two binary numbers x 1 x 0 and y 1 y 0 are equal.

PARITY GENRATOR AND CHECKER EX-OR gates used to implement parity generator and parity checker for even parity system.

INHIBIT CIRCUITS Four basic gates can either enable or inhibit the passage of and input signal, A, under control of the logic level at control input B.