SVAR'06, 24/05/06FastTrack1 FastTrack: A High Frame Rate Stereovision Tracking System Michael Belshaw Michael Greenspan Dept. of Electrical & Computer.

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Presentation transcript:

SVAR'06, 24/05/06FastTrack1 FastTrack: A High Frame Rate Stereovision Tracking System Michael Belshaw Michael Greenspan Dept. of Electrical & Computer Engineering Queen’s University Siraj W. James MacLean Dept. of Electrical & Computer Engineering University of Toronto Peter Chun Valeri Kirischian Vadim Geurkov Lev Kirischian Dept. of Electrical & Computer Engineering Ryerson University

SVAR'06, 24/05/06FastTrack2 Objective Develop a stereovision system capable of extracting range data at > 200 fps and tracking objects - state of the art for stereovision extraction ~ 30 fps Motivation: Autonomous Satellite Grasping Benefits: Increasing the speed of tracking will: 1. Allow us to track faster moving objects 2. Allow us to track slower moving objects more reliably 3. High frame rate stereovision and tracking will enable other applications

SVAR'06, 24/05/06FastTrack3 Fast Track: Satellite Grasping Automatic image recognition and docking system Ultra-fast (200 fps) stereo video acquisition Real-Time Video- Stream processing on the FPGA based platform

SVAR'06, 24/05/06FastTrack4 Propelling Collaboration FPGA Platform 200 fps Stereo Camera Fast Stereo-Vision Algorithms Object Tracking Algorithms 2 nd generation SVAR project

SVAR'06, 24/05/06FastTrack5 200 frame/sec. Stereo-Video Camera Object in the are of Stereo-vision Interface Module Video-Output Module FPGA-based Video-processing Platform FPGA: Xilinx Virtex-II Pro PCI-bus Interface Host Computer System Overview

SVAR'06, 24/05/06FastTrack6 PCI / FPGA Development Board PCI Bus (64b / 66 MHz) SRAM (2MB) 32b / 66 MHz PMC Site 64b / 66 MHz RS-232 (Debug) 16 / 200 MHz Virtex II Pro DDR-SDRAM (32 MB) Serial Port Memory / Control FPGA PCI I/O DDR-SDRAM (32 MB) 16 / 200 MHz SRAM (2MB) 32 / 166 MHz Expansion I/O Configuration Configuratio n Flash Program Flash CPLDSystem ACE Compact Flash Card Configuration network High Speed LVDS (360MHz) CAMERA interface High Speed LVDS (250MHz) FPGA to FPGA General I/O FPGA Platform

SVAR'06, 24/05/06FastTrack7 Stereovision

SVAR'06, 24/05/06FastTrack8 Object Tracking Two methods: ICP and BHT - focus on ICP - more standard - less complex to implement on FPGA

SVAR'06, 24/05/06FastTrack9 Project Timeline Jan project start Apr high frame rate camera July stereo calibration Oct high frame rate stereovision 1 Mar high frame rate tracking 1 Dec project closeout Jun high frame rate stereovision 2 Aug high frame rate tracking 2