3/11/2002CSE 141 - Input/Output Input/Output Control Datapath Memory Processor Input Output Memory Input Output Network Control Datapath Processor.

Slides:



Advertisements
Similar presentations
I/O InterfaceCS510 Computer ArchitecturesLecture Lecture 17 I/O Interfaces and I/O Busses.
Advertisements

Accessing I/O Devices Processor Memory BUS I/O Device 1 I/O Device 2.
1  1998 Morgan Kaufmann Publishers Interfacing Processors and Peripherals.
1 (Review of Prerequisite Material). Processes are an abstraction of the operation of computers. So, to understand operating systems, one must have a.
1/1/ / faculty of Electrical Engineering eindhoven university of technology Architectures of Digital Information Systems Part 1: Interrupts and DMA dr.ir.
1/1/ / faculty of Electrical Engineering eindhoven university of technology Introduction Part 3: Input/output and co-processors dr.ir. A.C. Verschueren.
FIU Chapter 7: Input/Output Jerome Crooks Panyawat Chiamprasert
EE30332 Ch8 DP – 1 Ch 8 Interfacing Processors and Peripherals Buses °Fundamental tool for designing and building computer systems divide the problem into.
Architectural Support for OS March 29, 2000 Instructor: Gary Kimura Slides courtesy of Hank Levy.
1 Lecture 2: Review of Computer Organization Operating System Spring 2007.
OS Fall ’ 02 Introduction Operating Systems Fall 2002.
1 Computer System Overview OS-1 Course AA
OS Spring’03 Introduction Operating Systems Spring 2003.
Computer System Organization S H Srinivasan
1 Last Class: Introduction Operating system = interface between user & architecture Importance of OS OS history: Change is only constant User-level Applications.
OS Spring’04 Introduction Operating Systems Spring 2004.
Exceptions, Interrupts & Traps
Chapter 13: I/O Systems I/O Hardware Application I/O Interface
What are Exception and Interrupts? MIPS terminology Exception: any unexpected change in the internal control flow – Invoking an operating system service.
Input/Output. Input/Output Problems Wide variety of peripherals —Delivering different amounts of data —At different speeds —In different formats All slower.
General System Architecture and I/O.  I/O devices and the CPU can execute concurrently.  Each device controller is in charge of a particular device.
Introduction to Embedded Systems
System Calls 1.
1 Computer System Overview Chapter 1. 2 n An Operating System makes the computing power available to users by controlling the hardware n Let us review.
Interrupts and DMA CSCI The Role of the Operating System in Performing I/O Two main jobs of a computer are: –Processing –Performing I/O manage and.
CHAPTER 2: COMPUTER-SYSTEM STRUCTURES Computer system operation Computer system operation I/O structure I/O structure Storage structure Storage structure.
Chapter 2: Computer-System Structures 2.1 Computer System Operation 2.5 Hardware Protection 2.6 Network Structure.
1 CS/COE0447 Computer Organization & Assembly Language Chapter 5 part 4 Exceptions.
2009 Sep 10SYSC Dept. Systems and Computer Engineering, Carleton University F09. SYSC2001-Ch7.ppt 1 Chapter 7 Input/Output 7.1 External Devices 7.2.
COMPUTER ORGANIZATIONS CSNB123 NSMS2013 Ver.1Systems and Networking1.
Chapter 2: Computer-System Structures Computer System Operation I/O Structure Storage Structure Storage Hierarchy Hardware Protection Network Structure.
I/O Computer Organization II 1 Interconnecting Components Need interconnections between – CPU, memory, I/O controllers Bus: shared communication channel.
CSC 2405 Computer Systems II Exceptions Mini-Lecture Traps & Interrupts.
Interrupt driven I/O. MIPS RISC Exception Mechanism The processor operates in The processor operates in user mode user mode kernel mode kernel mode Access.
1 CSE451 Architectural Supports for Operating Systems Autumn 2002 Gary Kimura Lecture #2 October 2, 2002.
Lecture Topics: 10/29 Architectural support for operating systems –timers –kernel mode –system calls –protected instructions.
CE Operating Systems Lecture 2 Low level hardware support for operating systems.
CS2100 Computer Organisation Input/Output – Own reading only (AY2015/6) Semester 1 Adapted from David Patternson’s lecture slides:
CE Operating Systems Lecture 2 Low level hardware support for operating systems.
Processor Structure and Function Chapter8:. CPU Structure  CPU must:  Fetch instructions –Read instruction from memory  Interpret instructions –Instruction.
Lecture 1: Review of Computer Organization
1 Lecture 1: Computer System Structures We go over the aspects of computer architecture relevant to OS design  overview  input and output (I/O) organization.
Chapter 6 Storage and Other I/O Topics. Chapter 6 — Storage and Other I/O Topics — 2 Introduction I/O devices can be characterized by Behaviour: input,
Input/Output Problems Wide variety of peripherals —Delivering different amounts of data —At different speeds —In different formats All slower than CPU.
IT3002 Computer Architecture
Interrupt driven I/O Computer Organization and Assembly Language: Module 12.
Lecture 2 Page 1 CS 111 Summer 2013 Hardware, Modularity, and Virtualization CS 111 Operating System Principles Peter Reiher.
Input Output Techniques Programmed Interrupt driven Direct Memory Access (DMA)
Silberschatz, Galvin and Gagne  Operating System Concepts Chapter 2: Computer-System Structures Computer System Operation I/O Structure Storage.
بسم الله الرحمن الرحيم MEMORY AND I/O.
1 Device Controller I/O units typically consist of A mechanical component: the device itself An electronic component: the device controller or adapter.
Interrupts and Exception Handling. Execution We are quite aware of the Fetch, Execute process of the control unit of the CPU –Fetch and instruction as.
Exceptional Control Flow
Architectures of Digital Information Systems Part 1: Interrupts and DMA dr.ir. A.C. Verschueren Eindhoven University of Technology Section of Digital.
Interrupts and exceptions
CS 3305 System Calls Lecture 7.
Computer System Overview
Exceptions Control Flow
Architectural Support for OS
CSE 451: Operating Systems Autumn 2003 Lecture 2 Architectural Support for Operating Systems Hank Levy 596 Allen Center 1.
CSE 451: Operating Systems Autumn 2001 Lecture 2 Architectural Support for Operating Systems Brian Bershad 310 Sieg Hall 1.
Interrupt handling Explain how interrupts are used to obtain processor time and how processing of interrupted jobs may later be resumed, (typical.
CSE 451: Operating Systems Winter 2003 Lecture 2 Architectural Support for Operating Systems Hank Levy 412 Sieg Hall 1.
Architectural Support for OS
Chapter 13: I/O Systems.
Chapter 13: I/O Systems “The two main jobs of a computer are I/O and [CPU] processing. In many cases, the main job is I/O, and the [CPU] processing is.
Presentation transcript:

3/11/2002CSE Input/Output Input/Output Control Datapath Memory Processor Input Output Memory Input Output Network Control Datapath Processor

CSE Input/Output2 Exceptions and Interrupts Terminology isn’t consistent. We’ll define: Exceptions: any unexpected change in control flow Branches and jumps are not considered exceptions. Exceptions are classified as either: –Internal Interrupts: Exception caused by something in the execution pipeline. arithmetic overflow illegal instruction divide by zero user program invoking the OS –External Interrupts: ones caused by something else. I/O device signals completion to CPU memory parity error timer signal low battery warning

CSE Input/Output3 Handling exceptions On an exception, the hardware needs to: 1.Save the PC (allows the OS look at the offending instructions and to later resume execution) 2.Record the nature of the exception/interrupt 3.Transfer control to exception handler (in OS) Two ways to do 2 & 3: Write cause of exception in a status register; pass control to the exception handler. Use vectored interrupt: transfers control to a different location for each possible type of interrupt/exception

CSE Input/Output4 User versus System operation User-level programs are restricted. –Only program state instructions can be executed No I/O, no ability to set the page table register, etc. Memory references are virtual addresses to user’s VM. –If a user program needs to do I/O, it signals the OS Typically by raising an exception System programs run in supervisor (aka kernel) mode –Can execute privileged instructions for I/O, etc. To accomplish I/O, hardware needs ability for: –OS to tell I/O device what to do –I/O devices to notify OS (e.g. “I’m done” or “I failed”) –Data to be transferred from device to memory

CSE Input/Output5 Giving Commands to I/O Devices Two methods are used to address I/O devices: –Special I/O instructions –Memory-mapped I/O Special I/O instructions specify a device number and a command Memory-mapped I/O: –Each I/O device is given a portion of the real address space To prevent chaos, these addressed aren’t mapped to users’ virtual memory. –Read and writes to those addresses (by the OS) are interpreted as commands by the I/O device

CSE Input/Output6 I/O Device Notifying the OS The OS needs to know when: –The I/O device has completed an operation –The I/O operation has encountered an error This can be accomplished in two different ways: –Polling: The I/O device put information in a status register The OS periodically check the status register –I/O Interrupt: Whenever an I/O device needs attention from the processor, it issues an interrupt to the processor.

CSE Input/Output7 Polling Advantage: –Simple: the processor is in control and does all the work Disadvantage: –Polling overhead can consume a lot of CPU time yes busy wait loop is an inefficient way to use the CPU unless the device is very fast! but checks for I/O completion can be dispersed among computation intensive code CPU IOC device Memory Is the data ready? read data store data yes no done? no

CSE Input/Output8 Interrupt Driven Data Transfer Advantage: –User program is only halted during actual transfer Disadvantage: – Special hardware is needed to Cause an interrupt (I/O device) Detect an interrupt (processor) add sub and or nop read store... rti memory user program (1) I/O interrupt (2) save PC (3) interrupt service addr interrupt service routine (4) CPU IOC device Memory :

CSE Input/Output9 Transferring Data to/form Memory Direct Memory Access (DMA): –External to the CPU –DMA controller is a bus master –Transfer blocks of data to or from memory without CPU intervention CPU IOC device Memory DMAC CPU sends a starting address, direction, and length count to DMA Controller. DMA Controller does whatever is needed to get IO Controller and Memory to transfer data on the bus.

CSE Input/Output10 Network technologies Local Area Network (LAN) –Ethernet is most common LAN technology 10 Mbit/sec, 100 Mbit/s (“fast Ethernet”) and 1 Gbit/s (“Gigabit Ethernet”) versions Originally, used “Aloha” protocol –If line is quiet, sender dumps message on wire –If message got garbled with another message, all senders wait a random amount of time and retry –Limits throughput to about 70% peak Today, often controlled by switches Wide Area Network (WAN) –IP (Internet Protocol) used on Internet. TCP layer on top of IP resends lost packets, etc –ATM (Asynchronous Transfer Protocol) Another protocol for long distances; 155 Mbit/sec to 2.5 Gbit/sec