1. CHAPTER 2: COMPUTER-SYSTEM STRUCTURES Computer system operation Computer system operation I/O structure I/O structure Storage structure Storage structure Storage hierarchy Storage hierarchy Hardware protection Hardware protection General system architecture General system architecture

2. COMPUTER SYSTEM OPERATION

3. Computer System Operation The CPU and I/O devices can execute concurrently. The CPU and I/O devices can execute concurrently. CPU CPU  fetches a instruction and executes it.  moves data from/to main memory to/from local buffers. Each device controller Each device controller  is in charge of a particular device type.  has a local buffer. I/O is from the device to local buffer of controller.  informs CPU that it has finished its operation by causing an interrupt.

4. Computer System Operation An operating system is interrupt driven. An operating system is interrupt driven.  Interrupt transfers control to the interrupt service routine generally, through the interrupt vector, which contains the addresses of all the service routines.  Interrupt architecture must save the address of the interrupted instruction.  Incoming interrupts are disabled while another interrupt is being processed to prevent a lost interrupt.  A trap is a software-generated interrupt caused either by an error or a user request.

5. Computer System Operation Interrupt handling Interrupt handling  The operating system preserves the state of the CPU by storing registers and the program counter.  Determines which type of interrupt has occurred:  polling  vectored interrupt system.  Separate segments of code determine what action should be taken for each type of interrupt.  Returns to the saved state or other parts of OS.

6. Computer System Operation Interrupt Time Line For a Single Process Doing Output

7. I/O STRUCTURE Synchronous I/O: After I/O starts, control returns to the user program only upon I/O completion. After I/O starts, control returns to the user program only upon I/O completion. How to wait for I/O completion: How to wait for I/O completion:  Wait instruction idles the CPU until the next interrupt.  Wait loop (contention for memory access). If the CPU always waits for I/O completion, at most one I/O request is outstanding at a time,. Thus, whenever an I/O interrupt occurs, the OS knows exactly which device is interrupting. If the CPU always waits for I/O completion, at most one I/O request is outstanding at a time,. Thus, whenever an I/O interrupt occurs, the OS knows exactly which device is interrupting. This approach excludes concurrent I/O operations to several devices, and also excludes the possibility of overlapping useful computation with I/O. This approach excludes concurrent I/O operations to several devices, and also excludes the possibility of overlapping useful computation with I/O.

8. I/O Structure Asynchronous I/O: After I/O starts, control returns to the user program without waiting for I/O completion. After I/O starts, control returns to the user program without waiting for I/O completion. System call – request the operating system to allow user to wait for I/O completion. System call – request the operating system to allow user to wait for I/O completion. Device-status table contains entry for each I/O device indicating its type, address, and state. Device-status table contains entry for each I/O device indicating its type, address, and state. Operating system indexes into I/O device table to determine device status and to modify table entry to include interrupt. Operating system indexes into I/O device table to determine device status and to modify table entry to include interrupt.

9. I/O Structure: DMA Used for high-speed I/O devices able to transmit information at close to memory speeds. Used for high-speed I/O devices able to transmit information at close to memory speeds. Device controller transfers blocks of data from buffer storage directly to main memory without CPU intervention. Device controller transfers blocks of data from buffer storage directly to main memory without CPU intervention. Only on interrupt is generated per block, rather than the one interrupt per byte. Only on interrupt is generated per block, rather than the one interrupt per byte.

10. STORAGE STRUCTURE Main memory – only large storage media that the CPU can access directly. Main memory – only large storage media that the CPU can access directly. Secondary storage – extension of main memory that provides large nonvolatile storage capacity. Secondary storage – extension of main memory that provides large nonvolatile storage capacity. Magnetic disks – rigid metal or glass platters covered with magnetic recording material (See the next slide) Magnetic disks – rigid metal or glass platters covered with magnetic recording material (See the next slide)  Disk surface is logically divided into tracks, which are subdivided into sectors.  The disk controller determines the logical interaction between the device and the computer. Magnetic tapes: sequential access, large capacity. Magnetic tapes: sequential access, large capacity.

11. Storage Structure

12. STORAGE HIERARCHY

13. Storage Hierarchy Storage systems organized in hierarchy. Storage systems organized in hierarchy.  Speed,  Cost,  Volatility. The design of a complete memory system must balance all these factors: The design of a complete memory system must balance all these factors:  It uses only as much expensive memory as necessary,  while providing as much inexpensive, nonvolatile memory as possible.

14. Storage Hierarchy: Caching Caching is an important principle of computer system: Information is normally kept in some storage system. Information is normally kept in some storage system. As it is used, it is copied into a faster storage system – the cache – on a temporary basis. As it is used, it is copied into a faster storage system – the cache – on a temporary basis. When we need a particular piece of information, we first check whether it is in the cache. When we need a particular piece of information, we first check whether it is in the cache.  If it is, we use the information directly from the cache;  If it is not, we use the information from the main storage system, putting a copy in the cache under the assumption that we will need it again soon.

15. Storage Hierarchy: Caching Use of high-speed memory to hold recently-accessed data. Use of high-speed memory to hold recently-accessed data. Requires a cache management policy. Requires a cache management policy. An example: Main memory can be viewed as a fast ache for secondary storage. An example: Main memory can be viewed as a fast ache for secondary storage. The movement of information between levels of a storage hierarchy may be either explicit or implicit, depending on the hardware design and the controlling operating – system software The movement of information between levels of a storage hierarchy may be either explicit or implicit, depending on the hardware design and the controlling operating – system software  Data transfer from ache to CPU and registers,  Data transfer from disk to memory.

16. Storage Hierarchy: Consistency

17. HARDWARE PROTECTION Dual-mode operation Dual-mode operation I/O protection I/O protection Memory protection Memory protection CPU protection CPU protection

18. Hardware Protection: Dual-mode operation Sharing system resources requires operating system to ensure that an incorrect program cannot cause other programs to execute incorrectly. Sharing system resources requires operating system to ensure that an incorrect program cannot cause other programs to execute incorrectly. Provide hardware support to differentiate between at least two modes of operations. Provide hardware support to differentiate between at least two modes of operations. 1.User mode – execution done on behalf of a user. 2.Monitor mode (also kernel mode or system mode or privileged mode) – execution done on behalf of operating system.

19. Hardware Protection: Dual-mode operation Mode bit added to computer hardware to indicate the current mode: monitor (0) or user (1). Mode bit added to computer hardware to indicate the current mode: monitor (0) or user (1). When an interrupt or fault occurs hardware switches to monitor mode. When an interrupt or fault occurs hardware switches to monitor mode. Privileged instructions can be issued only in monitor mode. monitoruser Interrupt/fault set user mode

20. Hardware Protection: I/O protection To prevent users from performing illegal I/O, we define all I/O instructions to be privileged instructions. To prevent users from performing illegal I/O, we define all I/O instructions to be privileged instructions. To do I/O, To do I/O,  A user program executes a system call to request that the OS perform I/O on its behalf.  The OS, executing in monitor mode, checks that the request is valid and (if the request is valid) does the I/O request.  The OS then returns to the user. Must ensure that a user program could never gain control of the computer in monitor mode (i.e., a user program that, as part of its execution, stores a new address in the interrupt vector). Must ensure that a user program could never gain control of the computer in monitor mode (i.e., a user program that, as part of its execution, stores a new address in the interrupt vector).

21. Hardware Protection: Memory protection Must provide memory protection at least for the interrupt vector and the interrupt service routines. Must provide memory protection at least for the interrupt vector and the interrupt service routines. In order to have memory protection, add two registers that determine the range of legal addresses a program may access: In order to have memory protection, add two registers that determine the range of legal addresses a program may access:  Base register – holds the smallest legal physical memory address.  Limit register – contains the size of the range. Memory outside the defined range is protected. Memory outside the defined range is protected.

22. Hardware Protection: Memory protection Use of A Base and Limit Register

23. Hardware Protection: Memory protection Hardware Address Protection When executing in monitor mode, the operating system has unrestricted access to both monitor and user ’ s memory. When executing in monitor mode, the operating system has unrestricted access to both monitor and user ’ s memory. The load instructions for the base and limit registers are privileged instructions. The load instructions for the base and limit registers are privileged instructions.

24. Hardware Protection: CPU protection Timer – interrupts computer after specified period to ensure operating system maintains control. Timer – interrupts computer after specified period to ensure operating system maintains control. To use the timer to prevent a user program from running too long To use the timer to prevent a user program from running too long  To initialize a counter with the amount of time that a program is allowed to run.  The timer is decremented every clock tick.  When the timer reaches the value 0, an interrupt occurs. Timer commonly used to implement time sharing. Timer commonly used to implement time sharing. Time also used to compute the current time. Time also used to compute the current time. Load-timer is a privileged instruction. Load-timer is a privileged instruction.

25. NETWORK STRUCTURE Two types of networks Two types of networks  Local-area networks (LAN)  Over small geographical areas (such as a single building)  Fast,  Reliable.  Wide-area networks (WAN)  Over a large geographical area (such as the US)  Slow,  Unreliable.

26. Network Structure: LAN

27. Network Structure: WAN