Computer Architecture Part III-A: Memory

A Quote on Memory “With 1 MB RAM, we had a memory capacity which will NEVER be fully utilized” - Bill Gates

Memory Computer pioneers correctly predicted that programmers would want unlimited memory Solution : memory hierarchy  Takes advantage of of locality and cost / performance of memory technologies  Using the principle of locality plus the guideline that smaller is faster resulted on a memory hierarchy based on memories of different speeds and sizes

Memory Measure: Access Time Time taken to read data from a given memory location, measured from the start of a read cycle. Components  Time to get to the location of the data  Time for the data to become available from the location in memory

Memory: Not created equally!

The Memory Subsystem CPU Cache L1/ Primary L2/ Secondary Main Memory

Memory Organization Address 0 Address 1 Address 2 Address N-2 Address N-1 N words - Number of words is generally 2 n Bit 1 Bit 2 Word Length = n bits About Naming Conventions: For example,a memory system with 4096 locations, each with a diff. Address and each storing 12 bits is called a 4096 word 12-bit memory or 4K 12-bit memory.

Getting Data from Main Memory Memory CPU Registers CPU Internal Bus MARMDR Address Bus Data Bus

Types of Memory : ROM Read-Only Memory  Contains instructions for starting up the computer  Contains constants that specify the system’s configuration

Types of ROM PROM (Programmable ROM) EPROM (Erasable PROM)  Programs are erasable via ultraviolet light EEPROM - Electrically EPROM  Programs are erasable by exposing it to an electrical charge

Types of Memory: RAM Random Access Memory Main memory Classification - Physical Characteristics  Static vs. Dynamic  Volatile vs. Nonvolatile  Destructive vs. Nondestructive  Removable vs. Permanent

Static vs. Dynamic STATIC Memory contents are refreshed less often Faster than DRAM but more expensive and requires more power More stable Access time: 10 ns DYNAMIC Memory contents are constantly refreshed otherwise the contents will be lost Cheaper to build, but slower than SRAMs Less stable than SRAM Access time: 60 ns.

Volatile vs. Nonvolatile A memory device is volatile if it requires a continuous source of power to hold its value, otherwise, it is non- volatile CD-Rs, hard disks, floppies, etc. - nonvolatile RAMs - volatile

Destructive Read vs. Non-Destructive Read Destructive Read When the system reads a word in memory, it destroys the value. Characteristics of all DRAMs In practice, the circuitry rewrites original value back to the cell via a two-phase operation: read cycle and restore cycle Non-Destructive Read Circuitry does not destroy the value of the memory cells

Removable vs. Permanent Removable Active elements can be removed from system hardware Examples: floppies, tape cartridges, hot swappable disks Permanent Components are not physically removed Example: RAM, hard disks, etc.

Packaging DIP Style DRAM package  Popular when it was common for memory to be installed directly on the computer's system board  ”Through-hole" components, which means they install in holes extending into the surface of the printed circuit board  Can be soldered in place or placed in sockets

Packaging SIMM (Single Inline Memory Module) DIMM (Dual Inline Memory Module)

Memory Banks

A Word about Virtual Memory An imaginary memory area supported by some OS in conjunction with the hardware Purpose: To enlarge the address space, which is the set of memory addresses a program can utilize A program using all of Virtual Memory (VM) will not fit in Main Memory (MM), but the system is able to execute it by copying the required portions into MM

Pages To facilitate copying portions of VM into MM, the OS divides VM into pages Pages: A fixed number of memory addresses Each page is stored on the disk until its needed

DRAM types: FPM Fast Page Mode RAM  Traditional RAM for PCs  Hard to find and more expensive  Access Times are 60 to 70 ns.  Allows faster access to data on the same page

DRAM types: EDO Extended Data Output  Faster by 10%-15% than FPM  Copies an entire block of memory to its internal cache; while the processor is accessing this cache, memory can collect a new block to send  EDO can access data faster if the cache controller supports PIPELINE BURST

About Pipeline Burst Purpose: Minimizes wait states so that memory can be accessed as fast as possible by the microprocessor How?  A burst mode that pre-fetches memory contents before they are requested  Pipelining so that one memory value can be accessed in the cache at the same time another memory value is accessed in DRAM

DRAM Types: BEDO Burst EDO  After an address has been specified, several bytes are then read within one clock cycle each  Transfer of information to the CPU much faster than EDO  Downside: Unable to cope well with system buses higher than 66 MHz

DRAM Types: SDRAM Synchronous DRAM  Runs on much higher clock speeds than conventional memory  Supports bus rates up to 133 MHz  Done by having two memory banks, one bank is used to get ready for access, while the second one is being accessed  PC 100/133: set of guidelines by Intel for synchronous DIMMS

DRAM types: RDRAM Rambus DRAM  Initially developed by Rambus, Inc.  Intel signed a contract for its endorsement (up to 2002) in 1997  Data transfer occurs on both edges of the clock  Packaged in RIMMS and installed in pairs in many units  Requires all memory slots in the motherboard to be populated (CRIMMS)  Royalties paid by manufacturers

DDR-SDRAM Also known as SDRAM II Packaged in DIMMS Cheaper than RDRAM Also utilizes both edges of the clock Not backward compatible with SDRAM No royalties