1. MICROPROCESSOR MEMORY ORGANIZATION
Chapter 3
MICROPROCESSOR
MEMORY ORGANIZATION

2. Outline 3.1 Introduction 3.2 Main memory
3.3 Microprocessor on-chip memory management unit and cache

3. 3.1 Introduction A memory unit :hold instructions and data.
Memory system can be divided into three groups:
1. Microprocessor memory: set of microprocessor registers, used to hold temporary results
2. Primary or main memory: storage area in which all programs are executed, include ROM & RAM
3. Secondary memory: devices such as hard disks, also called virtual memory.
The microcomputer cannot execute programs stored in the secondary memory directly, so to execute these programs the microcomputer must transfer them to its main memory by the operating system.

4. 3.1 Introduction
Larger, slower, and
cheaper (per byte) storage devices
registers
on-chip L1
cache (SRAM)
main memory
(DRAM)
local secondary storage (virtual memory)
(local disks)
remote secondary storage
(tapes, distributed file systems, Web servers)
off-chip L2
L0:
L1:
L2:
L3:
L4:
L5:
Smaller, faster, and more expensive (per byte) storage devices

5. 3.2 Main memory 8-bit microprocessors:
The memory is divided into a number of 8-bit units called memory words (byte). Therefore, for an 8-bit microprocessor, memory word and memory byte mean the same thing.

6. 3.2 Main memory 16-bit microprocessors:
The memory is divided into a word contains 2 bytes (16 bits). A memory word is identified in the memory by an address.
For example, the Pentium microprocessor uses 32-bit addresses for accessing memory words.
This provides a maximum of 232 = 4,294,964,296 = 4 GB of memory addresses, ranging from ,, to FFFFFFFF,, in hexadecimal.
data input lines
data output lines n k
address lines
Read
Write
memory
Unit of size 2k

7. LOW bit for segment number
3.2 Main memory
Intel Pentium microprocessors (1MB):
The memory is divided into segments
Segment = 216 =64KB= addressed by16bits
LOW bit for segment number
High bit for address

8. No. of segment (24) =size of memory (220) / size of one segment(216)
3.2 Main memory
I MB memory  220 / 216 = 24
For example, the computer uses 24 address pins to address 224= 16 MB of memory directly with addresses from ,, to FFFFFF,,.
No. of segment (24) =size of memory (220) / size of one segment(216)

9. 3.2 Main memory
An important characteristic of a memory is whether it is volatile or nonvolatile.
The contents of a volatile memory are lost when the power is turned off.
RAM is a volatile memory.
A nonvolatile memory retains its contents after power is switched off.
ROM is a typical example of nonvolatile memory.

10. 3.2.1 Read-only Memory ROMs are divided to:
mask ROM, Erasable PROM(EPROM), and EAROM (electrically alterable ROM)[also called EEPROM or E2PROM (electrically erasable PROM)]

11. 3.2.1 Read-only Memory
Mask ROMs are programmed by a masking operation performed on a chip during the manufacturing process. The contents of mask ROMs are permanent and cannot be changed by the user.
When designing a microcomputer for a particular application, permanent programs are stored in ROMs. Also, Control memories used to microprogram the control unit are ROMs.
EPROMs can be programmed, and their contents can also be altered by using special equipment, UV device/ EPROM programmer.
EPROMs must be removed from the microcomputer system for programming. This memory is erased by exposing the chip to ultraviolet light

12. 3.2.1 Read-only Memory
EAROMs can be programmed without removing the memory from the ROM’s sockets.
These memories are also called read-mostly memories (RMMs), because they have much slower write times than read times.
Flash memory (nonvolatile), is designed using a combination of EPROM and E2PROM technologies.
Flash memory can be reprogrammed electrically while embedded on the board. An example of Flash memory is used in cellular phones and digital cameras.

13. 3.2.2 Random-Access Memory
There are two types of RAM: Static RAM (SRAM), and Dynamic RAM (DRAM).
SRAM
DRAM
stores data in flip-flops (on/off switches).
stores data in capacitors.
memory does not need to be refreshed.
it can hold data for a few milliseconds, need to be refreshed
have lower densities
have higher densities
DRAMs are inexpensive, occupy less space, and dissipate less power than SRAMs.

14. 3.2.2 Random-Access Memory Two enhanced versions of DRAM are:
ED0 DRAM (Extended Data Output DRAM)
SDRAM (Synchronous DRAM).
The ED0 DRAM provides fast access by allowing the DRAM controller to output the next address at the same time the current data is being read.
An SDRAM contains multiple DRAMs (typically, four) internally. SDRAMs utilize the multiplexed addressing of conventional DRAMs.

15. 3.2.3 READ Timing Diagram
We consider the instruction fetch, memory READ, and memory WRITE timing diagrams

16. 3.2.3 READ Timing Diagram
1. The microprocessor performs the instruction fetch cycle to READ the opcode.
2. The microprocessor interprets the opcode as a memory READ operation.
3. When the clock signal goes HIGH, the microprocessor places the contents of MAR on the address A0-A19.
4. At the same time, the microprocessor raises the READ signal to HIGH.
5. The logic external to the microprocessor gets the contents of the location in the main ROM/RAM addressed by the MAR and places it on the Data bus.
6. Finally, the microprocessor gets this data from the Data bus via D0 – D15, and stores it in an internal register.

17. 3.2.3 WRITE Timing Diagram

18. 3.2.3 WRITE Timing Diagram Write timing
1. When the CLK signal goes HIGH, the microprocessor places the contents of the MAR on the address A0-A19 of the µp chip.
2. At the same time, the microprocessor raises the WRITE pin signal to HIGH.
3. The microprocessor places data to be stored from the contents of an internal register onto Data bus Do-D15.
4. The logic external to the microprocessor stores the data from the register into a RAM location addressed by the MAR.