Power-Aware Computing 101 CS 771 – Optimizing Compilers Fall 2005 – Lecture 22

CS 771, Fall Today Quick intro to power-aware computing  Special thanks to David Brooks! Paper discussion 1. Heath et al., "Code Transformations for Energy- Efficient Device Management", Hsu and Kremer, "The Design, Implementation, and Evaluation of a Compiler Algorithm for CPU Energy Reduction", 2003.

CS 771, Fall Why Worry about Power Dissipation? Environment Thermal issues: affect cooling, packaging, reliability, timing Battery life

CS 771, Fall Power Dissipation Trends Hot Plate Nuclear Reactor Pentium Pentium Pro Pentium 2 Pentium 3 Pentium 4 (Prescott) Pentium 4

CS 771, Fall Cooking-Aware Computing

CS 771, Fall Where Does the Juice Go in Laptops?

CS 771, Fall Environment Environment Protection Agency (EPA): computers consume 10% of commercial electricity consumption  This incl. peripherals, possibly also manufacturing  A DOE report suggested this percentage is much lower ( %)  No consensus, but it’s still a lot  Interesting to look at the numbers:  Data center growth was cited as a contribution to the 2000/2001 California Energy Crisis Equivalent power (with only 30% efficiency) for AC CFCs used for refrigeration Lap burn Fan noise

CS 771, Fall Now We Know Why Power is Important What can we do about it? Two components to the problem:  #1: Understand where and why power is dissipated  #2: Think about ways to reduce it at all levels of computing hierarchy  In the past, #1 is difficult to accomplish except at the circuit level  Consequently most low-power efforts were all circuit related

CS 771, Fall Power: The Basics Dynamic “switching” power vs. Static “leakage” power  Dynamic power dominates, but static power increasing in importance  Trends in each Static power: steady, per-cycle energy cost Dynamic power: capacitive and short-circuit  Capacitive power: charging/discharging at transitions from 0  1 and 1  0  Short-circuit power: power due to brief short-circuit current during transitions.  Most research focuses on capacitive, but recent work on others

CS 771, Fall Power Issues in Microprocessors Temperature Capacitive (Dynamic) Power Static (Leakage) Power Minimum Voltage 20 cycles Di/Dt (Vdd/Gnd Bounce) Voltage (V) Current (A) VinVout CLCL Vdd

CS 771, Fall Capacitive Power Dissipation Power ~ ½ CV 2 Af Capacitance: Function of wire length, transistor size Supply Voltage: Has been dropping with successive fab generations Clock frequency: Increasing… Activity factor: How often, on average, do wires switch?

CS 771, Fall Lowering Dynamic Power Reducing Vdd has a quadratic effect  Has a negative (~linear) effect on performance however Lowering C L  May improve performance as well  Keep transistors small (keeps intrinsic capacitance (gate and diffusion) small) Reduce switching activity  A function of signal transition stats and clock rate  Clock gating idle units  Impacted by logic and architecture decisions

CS 771, Fall Power vs. Energy

CS 771, Fall Power vs. Energy Power consumption in watts  Determines battery life in hours  Sets packaging limits Energy efficiency in joules  Rate at which energy is consumed over time  Energy = power * delay (joules = watts * seconds)  Lower energy number means less power to perform a computation at same frequency

CS 771, Fall Power vs. Energy Metrics Power-delay Product (PDP) = P avg * t  PDP is the average energy consumed per switching event Energy-delay Product (EDP) = PDP * t  Takes into account that one can trade increased delay for lower energy/operation Energy-delay 2 Product (EDDP) = EDP * t  Why do we need so many formulas?!!?  We want a voltage-invariant efficiency metric! Why?  Power ~ ½ CV 2 Af, Performance ~ f (and V)

CS 771, Fall On to the Discussion… 1. Heath et al., "Code Transformations for Energy- Efficient Device Management", Hsu and Kremer, "The Design, Implementation, and Evaluation of a Compiler Algorithm for CPU Energy Reduction", 2003.