Chap. 5 Field-effect transistors (FET) Importance for LSI/VLSI –Low fabrication cost –Small size –Low power consumption Applications –Microprocessors –Memories –Power Devices Basic Properties –Unipolar device –Very high input impedance –Capable of power gain –3/4 terminal device, G, S, D, B –Two possible device types: enhancement mode; depletion mode –Two possible channel types: n-channel; p- channel 5-1

MOSFET Structure Physical structure of a n-channel device: Typically L = 0.35 to 10  m, W = 2 to 500  m, and the thickness of the oxide layer is in the range of 0.02 to 0.1  m. Gate (G) insulated by thin layer of silicon dioxide Source (S) and Drain (D) regions are heavily doped n+ regions in the substrate (B) (also called body) 5-2

MOSFETs MOS - metal oxide semiconductor structure (original devices had metal gates, now they are silicon) NMOS - n-channel MOSFET PMOS - p-channel MOSFET CMOS - complementary MOS, both n-channel and p- channel devices are used in conjunction with each other (most popular in IC’s) MESFET - metal semiconductor structure, used in high- speed GaAs devices JFET - junction FET, early type of FET 5-3

With V GS = 0 there are two pn junctions between drain and source. Current cannot flow in either direction because one or the other of the junctions would be reverse-biased. However, if V GS > V T (threshold voltage), electrons are attracted to the region below the gate, and an induced, conducting n-channel forms between the drain and source. NOTE: i S = i D and i G = 0 A p-channel enhancement-type MOSFET is similar in construction but has an n-type substrate with p+ regions for the drain and source. 5-4

Cross section of a CMOS integrated circuit. Note that the PMOS transistor is formed in a separate n-type region, known as an n well. The two devices are isolated from each other by a thick region of oxide. CMOS 5-5

Symbols G D S B G D S B p Channel MOSFET (enhancement-type) -simplified symbol shown below n Channel MOSFET (enhancement-type) -simplified symbol shown below + V DS - + V GS - drain source gate source drain gate iSiS iDiD i G = 0 (Substrate is connected to source) 5-6

An n-channel MOSFET with v GS and v DS applied and with the normal directions of current flow indicated. The characteristics for p-channel devices are exactly the same except that voltage polarities and current directions are inverted. (Operates in triode and cutoff regions as a switch.) Output characteristics (n-channel) + V DS - 5-7

Input characteristics (n-channel) + V DS - I D = K(V GS -V T ) 2 5-8

Summary of MOSFET behavior V GS > V T (threshold voltage) for the device to be on V DS > V GS - V T for device to be in saturation region I D = K(V GS -V T ) 2 Enhancement mode device, V T > 0 (we will be dealing with enhancement mode devices in Chapter 13– MOS Digital Circuits) Depletion mode device, V T < 0 (conducts with V GS = 0) 5-9

Comparison of BJT and FET FET voltage controlled V GS > V T for device to be on operates in saturation region (amplifier); V DS > V GS - V T I D = K(V GS -V T ) 2 BJT current controlled V BE  0.7 V for device to be on operates in linear region (amplifier); BE junction forward biased, CB junction reversed biased I C =  I B 5-10

I D = K(V GS -V T ) 2 K = transconductance parameter K = k' (W/L) where k’ is the process transconductance parameter k' =  n C o x, where  n is the mobility of electrons, and C ox is the capacitance of the oxide (It’s value is determined by fabrication technology.) W/L is the aspect ratio, W is the width of the gate, L is the length of the gate. I D  W/L MOSFET aspect ratio 5-11