ENGIN112 L27: Counters November 5, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 27 Counters.

Slides:



Advertisements
Similar presentations
D-Type Flip Flops Benchmark Companies Inc PO Box
Advertisements

D Flip-Flop.
Lecture 23: Registers and Counters (2)
Registers and Counters
CHAPTER 3 Sequential Logic/ Circuits.  Concept of Sequential Logic  Latch and Flip-flops (FFs)  Shift Registers and Application  Counters (Types,
Digital Logic Chapter 5 Presented by Prof Tim Johnson
EKT 124 / 3 DIGITAL ELEKTRONIC 1
ECE 331 – Digital System Design Flip-Flops and Registers (Lecture #18) The slides included herein were taken from the materials accompanying Fundamentals.
Homework Reading Machine Projects Labs Tokheim Chapter 9.1 – 9.6
ENGIN112 L20: Sequential Circuits: Flip flops October 20, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 20 Sequential Circuits: Flip.
11/16/2004EE 42 fall 2004 lecture 331 Lecture #33: Some example circuits Last lecture: –Edge triggers –Registers This lecture: –Example circuits –shift.
CS 151 Digital Systems Design Lecture 20 Sequential Circuits: Flip flops.
CS370 Counters. Overview °Counter: A register that goes through a prescribed series of states °Counters are important components in computers. °Counters.
M.S.P.V.L. Polytechnic College, Pavoorchatram
ENGIN112 L26: Shift Registers November 3, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 26 Shift Registers.
Sequential Circuit Introduction to Counter
A.Abhari CPS2131 Registers A register is a group of n flip-flops each of them capable of storing one bit of information There are two types of registers:
Counters  A counter is a device which stores (and sometimes displays) the number of times a particular event or process has occurred, often in relationship.
A presentation on Counters
Electronics Technology
Counters.
SEQUENTIAL CIRCUITS USING TTL 74XX ICS
Chapter 1_4 Part II Counters
Chapter 7 Counters and Registers
Asynchronous Counter © 2014 Project Lead The Way, Inc.Digital Electronics.
Counter Section 6.3.
1 Sequential Circuits Registers and Counters. 2 Master Slave Flip Flops.
EE345: Introduction to Microcontrollers Register and Counters Prof. Ahmad Abu-El-Haija.
Lecture 27 Counters Give qualifications of instructors: DAP
Sequential Circuits Chapter 4 S. Dandamudi To be used with S. Dandamudi, “Fundamentals of Computer Organization and Design,” Springer,  S.
Registers and Counters
Rabie A. Ramadan Lecture 3
SEQUENTIAL CIRCUITS Component Design and Use. Register with Parallel Load  Register: Group of Flip-Flops  Ex: D Flip-Flops  Holds a Word of Data 
2017/4/24 CHAPTER 6 Counters Chapter 5 (Sections )
ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN Lecture 17 Dr. Shi Dept. of Electrical and Computer Engineering.
Registers and Counters by Dr. Amin Danial Asham. References  Digital Design 5 th Edition, Morris Mano.
7-6 단일 레지스터에서 Microoperation Multiplexer-Based Transfer  Register 가 서로 다른 시간에 둘 이상의 source 에서 data 를 받을 경우 If (K1=1) then (R0 ←R1) else if (K2=1) then.
Computer Organization & Programming Chapter 5 Synchronous Components.
Registers and Counters
Counters and Registers Synchronous Counters. 7-7 Synchronous Down and Up/Down Counters  In the previous lecture, we’ve learned how synchronous counters.
Digital Electronics.
COUNTERS Why do we need counters?
Unit 1 – Counters and Registers Mr. Grimming. Introduction FFs and logic gates are combined to form various counters and registers. Unit Goals Goals:
Flip Flops 3.1 Latches and Flip-Flops 3 ©Paul Godin Created September 2007 Last Edit Aug 2013.
Counters and registers Eng.Maha Alqubali. Registers Registers are groups of flip-flops, where each flip- flop is capable of storing one bit of information.
1 Registers A register is a group of n flip-flops each of them capable of storing one bit of information There are two types of registers: parallel and.
1 Homework Reading –Tokheim Chapter 9.1 – 9.6 Machine Projects –Continue on mp3 Labs –Continue in labs with your assigned section.
Sequential logic circuits First Class 1Dr. AMMAR ABDUL-HAMED KHADER.
Date: 01/12/2014 Asynchronous (Ripple) Counters Patel Siddhi P rd SEM Computer Science and Engneering B.M.C.E.T Subject Name: Digital Electronics.
FLIP FLOPS Binary unit capable of storing one bit – 0 or 1
LATCHED, FLIP-FLOPS,AND TIMERS
Homework Reading Machine Projects Labs Tokheim Chapter 9.1 – 9.6
Sequential Logic.
Prof. Hsien-Hsin Sean Lee
EKT 221 : Digital 2 COUNTERS.
Sequential Logic Counters and Registers
Sequential Circuit: Counter
D Flip-Flop.
Registers and Counters Register : A Group of Flip-Flops. N-Bit Register has N flip-flops. Each flip-flop stores 1-Bit Information. So N-Bit Register Stores.
29-Nov-18 Counters Chapter 5 (Sections ).
ECEN 248: INTRODUCTION TO DIGITAL SYSTEMS DESIGN
Computer Architecture and Organization: L02: Logic design Review
CSE 370 – Winter Sequential Logic-2 - 1
FLIP-FLOPS.
Digital Logic Department of CNET Chapter-6
Digital Logic Department of CNET Chapter-6
Flip-Flops.
14 Digital Systems.
Outline Registers Counters 5/11/2019.
Digital Electronics and Logic Design
Presentation transcript:

ENGIN112 L27: Counters November 5, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 27 Counters

ENGIN112 L27: Counters November 5, 2003 Overview °Counters are important components in computers The increment or decrement by one in response to input °Two main types of counters Ripple (asynchronous) counters Synchronous counters °Ripple counters Flip flop output serves as a source for triggering other flip flops °Synchronous counters All flip flops triggered by a clock signal °Synchronous counters are more widely used in industry.

ENGIN112 L27: Counters November 5, 2003 Counters °Counter: A register that goes through a prescribed series of states °Binary counter Counter that follows a binary sequence N bit binary counter counts in binary from n to 2 n-1 °Ripple counters triggered by initial Count signal °Applications: Watches Clocks Alarms Web browser refresh

ENGIN112 L27: Counters November 5, 2003 Binary Ripple Counter °Reset signal sets all outputs to 0 °Count signal toggles output of low-order flip flop °Low-order flip flop provides trigger for adjacent flip flop °Not all flops change value simultaneously Lower-order flops change first °Focus on D flip flop implementation

ENGIN112 L27: Counters November 5, 2003 Another Asynchronous Ripple Counter °Similar to T flop example on previous slide

ENGIN112 L27: Counters November 5, 2003 Asynchronous Counters °Each FF output drives the CLK input of the next FF. °FFs do not change states in exact synchronism with the applied clock pulses. °There is delay between the responses of successive FFs. °Ripple counter due to the way the FFs respond one after another in a kind of rippling effect. A3A3 A2A A1A A0A

ENGIN112 L27: Counters November 5, 2003 Synchronous counters °Synchronous(parallel) counters All of the FFs are triggered simultaneously by the clock input pulses. All FFs change at same time °Remember If J=K=0, flop maintains value If J=K=1, flop toggles °Most counters are synchronous in computer systems. °Can also be made from D flops °Value increments on positive edge

ENGIN112 L27: Counters November 5, 2003 Synchronous counters °Synchronous counters Same counter as previous slide except Count enable replaced by J=K=1 Note that clock signal is a square wave Clock fans out to all clock inputs

ENGIN112 L27: Counters November 5, 2003 Circuit operation °Count value increments on each negative edge °Note that low-order bit (A) toggles on each clock cycle

ENGIN112 L27: Counters November 5, 2003 Synchronous UP/Down counters °Up/Down Counter can either count up or down on each clock cycle °Up counter counts from 0000 to 1111 and then changes back to 0000 °Down counter counts from 1111 to 0000 and then back to 1111 °Counter counts up or down each clock cycle °Output changes occur on clock rising edge

ENGIN112 L27: Counters November 5, 2003 Counters with Parallel Load °Counters with parallel load can have a preset value °Load signal indicates that data (I 3 …I 0 ) should be loaded into the counter °Clear resets counter to all zeros °Carry output could be used for higher-order bits

ENGIN112 L27: Counters November 5, 2003 Counters with Parallel Load Clear Clk Load Count Function 0 X X X Clear to 0 1 ↑ 1 X Load inputs 1 ↑ 0 1 Count 1 ↑ 0 0 No Change Function Table °If Clear is asserted (0), the counter is cleared °If Load is asserted data inputs are loaded °If Count asserted counter value is incremented

ENGIN112 L27: Counters November 5, 2003 Binary Counter with Parallel Load and Preset Presettable parallel counter with asynchronous preset. If PL’ = 0, load P into flops

ENGIN112 L27: Counters November 5, 2003 Binary Counter with Parallel Load and Preset Commercial version of binary counter

ENGIN112 L27: Counters November 5, 2003 Summary °Binary counters can be ripple or synchronous °Ripple counters use flip flop outputs as flop triggers Some delay before all flops settle on a final value Do no require a clock signal °Synchronous counters are controlled by a clock All flip flops change at the same time °Up/Down counters can either increment or decrement a stored binary value Control signal determines if counter counts up or down °Counters with parallel load can be set to a known value before counting begins.