Sherry Xiaoxia Wu*, Ravi Varadarajan †, Navneet Mohindru †, Durodami Lisk*, Riko Radojcic* *Qualcomm Inc. † Atrenta Inc. PathFinding Methodology for Interposer and 3D Die Stacking

2 Outline Motivation of PathFinding Methodology PathFinding Methodology Flow Demonstrations using an Example Conclusion

3 Typical 3D Design Options Courtesy: Si2

4 Motivation of PathFinding Methodology Navigating many choices ….  Cost, power, performance… Co-optimize process & design Need a structured design exploration methodology  Past experience not applicable to disruptive technologies  Not tie to legacy design  Quick and flexible  High fidelity/low accuracy Need methodology to make the selections PathFinding

5 PathFinding Methodology Many more challenges in 3D: - IP/tier assignment - Intra/inter die floorplan - Power & thermal - Timing across dies - TSV & stack configuration - TSV/bump alignment Design Architecture RTL, Blackbox, Netlist, Top level SDC/DEF/IO Constr, Interfaces, Tier/die config. Design Architecture RTL, Blackbox, Netlist, Top level SDC/DEF/IO Constr, Interfaces, Tier/die config. Early Design Planning Early Design Planning Physical Units Handoff 1 Logical, Physical, Timing Physical Units Handoff 1 Logical, Physical, Timing Backend Implementation 1 Backend Implementation 1 Tier/ Die 1 … … Physical Units Handoff N Logical, Physical, Timing Physical Units Handoff N Logical, Physical, Timing Backend Implementation N Backend Implementation N Tier/ Die N

6 PathFinding Methodology Create logical partitions for each die Are interconnectivity and TSV reports for all dies acceptable? 3D stack XML file N Commit logical partitions in to 3D physical partitions Y Y Physical prototyping on each die partition Modify partitions N Modify TSV cluster/locations Backside RDL/ Interposer routing N Modify number of RDL layers/bump locations Are all dies physically feasible? Is Backside RDL routing/Interposer feasible? 1.Handoff 3D stack XML file with partitions 2.Handoff DEF file for every partition Y

7 3D Format - XML Two Dies on a Passive Interposer Two Stacked Dies XML: Ongoing Standardization Interposer and 3D die stacking

8 Logic Partition Block in bottom die Block in top die TSV Bottom die front-side net Bottom die backside net Bottom die backside ubump Top die frontside ubump Top die frontside net Dummy net

9 Floorplan Constraints and An Example TSV/ubmp size, XML Create/mark TSV/ubump clusters Assign TSVs/ubump to clusters Set cluster utilization/aspect ratio FP constraints: guide/region Floorplan constraints  Blackbox locations  Die utilization: block area/die area  Number of TSV clusters: 2, 4, 8  TSV size/pitch/location  ubump size/pitch/location

10 Floorplan Options for a LoL Case TSVTSV Number of TSV clusters TSV cluster guide TSV cluster aspect ratio TSV pitch 2 TSV clusters 4 TSV clusters8 TSV clusters TSV cluster guideTSV aspect ratio

11 Frontside Routing Analysis Vary bottom and top routing layer Vary macro routing layer Vary routing porosity in a window for PDN/DFT consideration

12 Backside Routing Analysis Explore BRDL options when TSV and ubumps are not aligned Vary number of BRDL layers and pitch ubump group 2 Foundry OSAT Above 2 BRDL layers, more complicated and expensive process

13 2.5D Interposer Interposer Floorplan, Interposer Routing and Congestion 2 interposer routing layers, pitch = 5um 2 interposer routing layers, pitch = 2um 2 interposer routing layers, pitch = 1um

14 Conclusion A physical PathFinding methodology for interposer and 3D die stacking is presented The results show that with this methodology, users are able to explore different process and design options for early estimation of their designs to reduce expensive backend iterations This methodology is a general flow, it also works for mixed interposer and 3D die stacking