ECE 477 Design Review Team 6  Spring 2010 Shao-Fu ShihSteve AndersonMike Goldfarb Josh Smith.

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Presentation transcript:

ECE 477 Design Review Team 6  Spring 2010 Shao-Fu ShihSteve AndersonMike Goldfarb Josh Smith

Outline Project overview Project-specific success criteria Block diagram Component selection rationale Packaging design Schematic and theory of operation PCB layout Software design/development status Project completion timeline Questions / discussion 3/4/10 2 ECE477 Group 6

Project Overview High fidelity audio transceiver – Transmitter with mic input and volume control – Receiver applies EQ and digital mute – Auxiliary line-in on receiver Receiver User Interface – Adjust EQ and digital mute – Control volume – Display other device status information 3/4/10 3 ECE477 Group 6

Project-Specific Success Criteria 1.An ability to wirelessly transmit and receive a digital audio signal. 2.An ability to display information to the user on an LCD about the status of the device. 3.An ability to apply digital mute to the audio signals based on a threshold. 4.An ability to allow the user to adjust EQ effects applied to audio signals. 5.An ability to control output volume wirelessly from the transmitter. 3/4/10 4 ECE477 Group 6

Transmitter Block Diagram 3/4/10 5 ECE477 Group 6

Receiver Block Diagram 3/4/10 6 ECE477 Group 6

Component Selection Rationale ADSP SHARC – Digital Signal Processor ATmega168 – Microcontroller nRF24Z1 – 2.4GHz Wireless Transceiver CFA634-TMC-KS – Liquid Crystal Display 3/4/10 7 ECE477 Group 6

Component Selection Rationale PCM4202 – Digital to Analog Converter PCM1792A – Analog to Digital Converter OPA1611 – Audio Operational Amplifier OPA1632 – Differential Signal Operational Amplifier PGA2505 – Digitally Controlled Microphone Driver 3/4/10ECE477 Group 6 8

Transmitter: Package Design 5/1/2015 ECE477 Group 6 9

Receiver: Package Design 5/1/2015 ECE477 Group 6 10

Transmitter: Voltage Regulators NiMH AA battery pack: 6V/2A V DD step down voltage regulating chain: – 6V  5V  3.3V (Low drop off) V CC and -V CC voltage regulating chain: – 6V  5V (low drop off) – 6V  -5V (low drop off) 3/4/10 11 ECE477 Group 6

Transmitter: DRV134 and PGA2505 3/4/10 12 ECE477 Group 6

Transmitter: PCM4202 3/4/10 13 ECE477 Group 6

Transmitter: ATmega168 3/4/10 14 ECE477 Group 6

Transmitter: nRF24Z1 3/4/10 15 ECE477 Group 6

Receiver: Voltage Regulators Wall-wart: 19V/2.4A V DD step down voltage regulating chain: – 19V  15V  10V  5V  3.3V  1.2V (1.5A max) V CC and -V CC voltage regulating chain: – 19V -> 15V -> 5V (1.5A max) – 19V -> 15V -> -15V (1.2A max) 3/4/10 16 ECE477 Group 6

Receiver: OPA1632 3/4/10 17 ECE477 Group 6

Receiver: ADSP /4/10 18 ECE477 Group 6

Receiver: ATmega168 3/4/10 19 ECE477 Group 6

Receiver: PCM1792A 3/4/10 20 ECE477 Group 6

Receiver: Audio Output 3/4/10 21 ECE477 Group 6

Transmitter: PCB Layout Top 3/4/10 22 ECE477 Group 6

Transmitter: PCB Layout Bottom 3/4/10 23 ECE477 Group 6

Receiver: PCB Layout Top 3/4/10 24 ECE477 Group 6

Receiver: PCB Layout Bottom 3/4/10 25 ECE477 Group 6

Software Design/Development Status ADSP – ADC/DAC device drivers done – Two-channel audio processing loop complete ATmega168 / ADSP communication – In progress User Interface – LCD driver development over spring break – Encoder and pushbutton interfacing done nRF24Z1 – Driver in development 3/4/10 26 ECE477 Group 6

Project Completion Timeline March 12: Final PCB Submission and Proof of Parts March 22 – April 9: Board Assembly and Test April 16: Final Software Revision April 28: Design PSSC Demonstration 3/4/10 27 ECE477 Group 6