Programmable Logic Devices

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Presentation transcript:

Programmable Logic Devices Lecture No. 21 Programmable Logic Devices

Recap PLA Device Implementing 0 and 1 Implementing Odd-Prime Number GAL Operation EECMOS cells Programming PLDs

Recap GAL22V10 OLMC Combinational Mode Registered Mode

GAL16V8 Emulate PALs three modes OLMC 8 inputs 2 special function inputs 8 outputs 8 sum-of-product terms Each has 8 product terms OLMC Output control (4 options) Feedback control (3 options) OR gate output (programmed polarity)

GAL16V8 Simple Mode (3 options) Complex Mode (2 options) Combinational Output (fig 1) Combinational o/p with feedback (fig 2) Dedicated Input (fig 3) Complex Mode (2 options) Combinational o/p (fig 4) Combinational Input/output (fig 5) Registered Mode

ABEL Acronym Advanced Boolean Expression Language ABEL Boolean Operators and Notations (tab 1, 2) Programming by Boolean expression ABEL Boolean expression (fig 6) Defining multiple Inputs/Outputs (tab 3 fig 7) Defining sets (fig 8, 9)

ABEL Programming by Truth Table Test Vectors XOR gate (fig 10) Comparator (fig 11) Comparator using sets (fig 12) Test Vectors Comparator (fig 13 14) ABEL Input File three sections Declarations (device, pin, set) (fig 15) Logic Description

Implementing Quad MUX Quad 1-of-4 function table (tab 4) ABEL Input file for the MUX (fig 16) ABEL Implementation for MUX (fig 17)