EE 5340 Semiconductor Device Theory Lecture 26 - Fall 2009 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc

Table 8.4 (p. 398 M&K 3rd edition) Charge Conditions in the MOS System L 26 Nov 19

Figure 8.11 (p. 399 M&K 3rd edition) General behavior of C-V curves of an ideal MOS system under different dc bias and ac small-signal conditions. The low-frequency (LF) C-V curve corresponding to the simplified model is shown as a dashed line. L 26 Nov 19

Figure 8. 12 (p. 401 M&K 3rd edition) MOS C-V measurement system Figure 8.12 (p. 401 M&K 3rd edition) MOS C-V measurement system. The voltmeter and ammeter measure both the magnitude and phase of the voltage across the diode and the current through it. L 26 Nov 19

Figure 8.13 (p. 402 M&K 3rd edition) Quasi-static C-V measurement apparatus used to obtain low-frequency C-V characteristics. L 26 Nov 19

Figure 8.14a & b (p. 404 M&K 3rd edition) The effects of a fixed oxide-charge density Qox on the MOS system. (a) Charge configuration at zero bias: Qox = Qs + QG; (b) charge at flat band: Qox = QG. L 26 Nov 19

Figure 8.15 (p. 405 M&K 3rd edition) Fixed charge in the oxide causes the capacitance-voltage curve to translate along the VG axis without distortion (dashed curve); charge that is influenced by the gate voltage causes distortion (dotted curve). L 26 Nov 19

Figure 8.16 (p. 406 M&K 3rd edition) (a) Four categories of oxide charge in the MOS system. The symbols for the charge densities Q (C cm-2), and state densities N (states cm-2) or D (states cm-2 eV-1) have been standardized [4]. (b) Energy levels at the oxide-silicon interface. The interface trapping levels are distributed with density Dit (states cm-2 eV-1) within the forbidden-gap energies. L 26 Nov 19

Effect of Q’ss on the C-V relationship Fig 10.29* L 26 Nov 19

Fully biased n-MOS capacitor VG Channel if VG > VT VS VD EOx,x> 0 n+ e- e- e- e- e- e- n+ p-substrate Vsub=VB Depl Reg Acceptors y L L 26 Nov 19

MOS energy bands at Si surface for n-channel Fig 8.10** L 26 Nov 19

Equations for VT calculation L 26 Nov 19

n-channel enhancement MOSFET in ohmic region 0< VT< VG Channel VS = 0 0< VD< VDS,sat EOx,x> 0 n+ e-e- e- e- e- n+ Depl Reg p-substrate Acceptors VB < 0 L 26 Nov 19

Conductance of inverted channel Q’n = - C’Ox(VGC-VT) n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2) The conductivity sn = (n’s/t) q mn G = sn(Wt/L) = n’s q mn (W/L) = 1/R, so I = V/R = dV/dR, dR = dL/(n’sqmnW) L 26 Nov 19

Basic I-V relation for MOS channel L 26 Nov 19

I-V relation for n-MOS (ohmic reg) ID non-physical ID,sat saturated VDS,sat VDS L 26 Nov 19

Universal drain characteristic ID VGS=VT+3V 9ID1 ohmic saturated, VDS>VGS-VT VGS=VT+2V 4ID1 VGS=VT+1V ID1 VDS L 26 Nov 19

Characterizing the n-ch MOSFET VD ID D G S B VT VGS L 26 Nov 19

Substrate bias effect on VT (body-effect) L 26 Nov 19

Body effect data Fig 9.9** L 26 Nov 19

Low field ohmic characteristics L 26 Nov 19

MOSFET circuit parameters L 26 Nov 19

MOSFET circuit parameters (cont) L 26 Nov 19

MOSFET equivalent circuit elements Fig 10.51* L 26 Nov 19

MOS small-signal equivalent circuit Fig 10.52* L 26 Nov 19

MOS channel- length modulation Fig 11.5* L 26 Nov 19

Analysis of channel length modulation L 26 Nov 19

Channel length mod- ulated drain char Fig 11.6* L 26 Nov 19

References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986 L 26 Nov 19