MAPS with advanced on-pixel processing D. Biagetti (1, 2), G.M. Bilei(1) , P. Ciampolini(1,3), P. Delfanti(1, 3), A. Marras(1,3), G. Matrella(1, 3), D. Passeri(1, 2), P. Placidi(1, 2), M. Petasecca(1, 2), L. Servoli(1) (1) Istituto Nazionale di Fisica Nucleare Sezione di Perugia – Italy (2) Dipartimento di Ingegneria Elettronica e dell’Informazione Università degli Studi di Perugia - Italy (3) Dipartimento di Ingegneria dell’Informazione Università di Parma - Italy

Outline APS: innovative architectures  ray  particle  particle WIPS SHARPS in-pixel CDS

RAPS 01 – 02 RAPS01 prototype UMC 0.18 mm technology RAPS02 prototype Digitally configurable photodiode bias point and decision threshold level RAPS02 prototype 4-14m 10.3m APS architecture WIPS architecture SHARPS architecture

APS: -ray detection Source Americium 241 -ray : 60 keV 12-21 keV

APS: -particle detection single α hit causes cluster response > 30 pixels involved Source Americium 241 -particle : 5.4 MeV

APS: -particle detection Source Strontium 90 -particle : 0.546 MeV

Test results Cluster signal distibution for 90Sr (  ) source. Volt Cluster signal distibution for 141Am (  ) source. Volt MPV evaluated to be equivalent to about 20 MIPs

Noise measurements SNR  >  -particle response  450 mV 450 (MPV evaluated to be equivalent to 15-20 IPs)  450 mV SNR  20 450 1.16 > 19 MIP pixel (kTC) noise  1.16mV No SEU malfunction were reported

Photodiode Pixel 3D physical simulation (device/circuit) ~tens of mV ~tens of nsec VDD RESET FTD OUT Particle 3D physical simulation (device/circuit)

Radiation Damage

Configurable amplification Source IR laser =875nm photodiode analog amplification

Configurable amplification Source IR laser =875nm photodiode digital amplification

α-particle detection “analog” readout mode single α hit causes cluster response > 30 pixels involved 300-400mV “digital” (on/off) readout mode cluster size limited to 4-9 pixels 1.6V

Innovative architectures: goals APS source follower: low in-pixel amplification factor 1 output pin per pixel: limits on scalability sequential scan: limits on readout frequency Proposed solutions exploit CMOS features to achieve a more efficient in-pixel amplification x-y readout event-triggered readout

Innovative architectures: WIPS row column VTH weakly inverted MOS BASIC IDEA

Innovative architectures: WIPS 10.3 mm uniform exposition to 976.2 nm, 1.41 W/mm2 laser source pmos nwell: parassite charge collection risk weakly inverted MOS: power dissipation (20 W / pixel) MIP simulated response x-y read-out approach may reduce read-out times by a (m +n )/(m xn) factor in a (m xn) array

Innovative architectures: SHARPS row column BASIC IDEA self reset high-gain amplification stage A/D internal A/D conversion

Innovative architectures: SHARPS offset from photodiode center 10.3 mm MIP simulated response fill-factor 15.08% power dissipation 823 nW / pixel Capable of both synchronous and x-y event-triggered readout Resolution: 2.6 m

Innovative architectures: SHARPS delayed self reset GND fast VDD A/D A/D event triggered mode sequential scan mode

Innovative architectures: CDS in pixel BASIC IDEA column output read CDS reset high ampl. on-pixel Correlated Double Sampling circuitry 10.3 mm

Innovative architectures: CDS in pixel VREF gnd VSIG VSIG -VREF RESET SAMPLE signal integration period reference sampling signal CDS reset

Conclusions Active Pixel Sensor systems have been designed and fabricated in a commercial 0.18 m CMOS technology. TCAD tools thoroughly exploited in the design phase. Preliminary test results: satisfactory response to , , , X, IR stimuli promising performance (SNR). Innovative architectures introduced. Extensive test to be completed: statistical characterization; dynamic performance; radiation damage analysis; beam test. Next generation chip