CSCI206 - Computer Organization & Programming Speaking the Computer’s Language zyBook: 5.1, 5.2, 5.3

History John von Neumann - mathematician Born 28 Dec 1903, Budapest, Hungary Died 8 Feb 1957, Washington DC Developed and promoted the modern model of computing. Now called the von Neumann Architecture.

"Princeton IAS computer" by National Museum of Americal History - http://americanhistory.si.edu/collections/search/object/nmah_334741. Licensed under Public Domain via Wikimedia Commons - http://commons.wikimedia.org/wiki/File:Princeton_IAS_computer.jpg#mediaviewer/File:Princeton_IAS_computer.jpg

The von Neumann Architecture A program consists of a stream of instructions which are stored in memory. The program is executed by sequentially fetching instructions from memory and carrying them out according to specification.

Memory in Processor - Registers A register is a multiple-bit storage unit; that is, memory within the processor for data or instructions. It can be written into and read from. It is the fastest kind of memory the computer system can have. A microprocessor has a number of registers. Each one is uniquely identified. Registers are used to store values for processing. The compiler associates variables with registers.

MIPS Technologies Similar to many RISC architectures developed since the 1980’s MIPS Technologies developed the MIPS architecture (in 2013 MIPS was acquired by Imagination Technologies) 500 million processors shipped each year (more than Intel) 75% of Blu-Ray players use a MIPS processor in addition to networking hardware, digital TVs, set-top boxes, widely use MIPS processors

MIPS: 32 Registers

MIPS Instructions The ISA supports up to 64 instructions In practice not all are actually used 31 instructions for integer programs 24 instructions for floating point operations

MIPS Arithmetic Basic arithmetic instructions have 3 operands “The natural number of operands for an operation like addition is three…requiring every instruction to have exactly three operands, no more and no less, conforms to the philosophy of keeping the hardware simple.” MIPS Arithmetic Basic arithmetic instructions have 3 operands order is fixed: destination, source1, source2 C Code: a = b + c; MIPS instruction: add a, b, c C Code: a = b - c; MIPS instruction: sub a, b, c

Design Principle 1 Simplicity favors regularity Operands must be registers Each register contains one word (e.g., 32 bits) Cons?

Design Principle 1 Simplicity favors regularity Operands must be registers Each register contains one word (e.g., 32 bits) C Code: a = b + c + d; MIPS instructions: add a, b, c add a, a, d

socrative.com student login: MENG7820 Check What is the minimum number of MIPS instructions needed to execute the C statement below, not counting the five registers holding all the values? a. 1 b. 2 c. 3 d. 4

Operand Types Instructions require operands Registers are one type of operand We might also want to operate on: immediate (constant) values Or data somewhere in memory In MIPS, the instruction encodes the operand type

MIPS Arithmetic Summary Category Instruction Example Meaning Comments Arithmetic add add $rd, $rs, $rt $rd = $rs + $rt data in registers subtract sub $rd, $rs, $rt $rd = $rs - $rt add immediate addi $rt, $rs, 1 $rt = $rs + 1 data in register and immediate value (e.g., 1) subtract immediate addi $rt, $rs, -100 $rt = $rs - 100 data in register and immediate value (e.g., -100) Stop do activity.

MIPS Memory Model MIPS (along with other RISC processors) are a load / store architecture The only instructions that operate on memory are load and store load = read data from memory and load it into a CPU register store = take register data from the CPU and store it into a memory address

Memory Organization Memory is viewed as a one-dimensional array of bytes: Address Contents Value 10 8 bits of data t 11 e 12 s 13 14 \0 char msg[] = “test”; &msg[0] == 10

Word Addresses Usually we care about addressing words not bytes We will be talking about a 32-bit MIPS machine, so a word is 32-bits long and each register holds one word Word addresses begin at 0 and are multiples of 4

A more accurate view of memory address word value 8 bits 4 8 12 32 bits char msg[] = “test”;

MIPS Memory Access Category Instruction Example Meaning Comments Data Transfer load word lw $rt, 16($rs) $rt = MEM[$rs+16] move data from memory address ($rs + 16) into register $rt store word sw $rt, 0($rs) MEM[$rs + 0] = $rt move data from register $rt into memory address ($rs + 0)

Positional Number Systems n-th digit base Example: in base 10 (decimal)

Common bases Decimal: b=10, digits={0,1,2,3,4,5,6,7,8,9} Binary: b=2, digits={0,1} Octal: b=8, digits={0,1,2,3,4,5,6,7} Hexadecimal: b=16, digits={0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F}

Conversion Shortcuts from binary Binary to octal: each group of three binary digits gives a complete octal digit Binary to hexadecimal: each group of four binary digits gives a complete hex digit

Endianness The order in which bytes are stored in a multibyte word big-endian: stored with the most significant bits first (natural order when read from left to right) little-endian: stored with the least significant bits first (looks weird) In practice, the values are grouped in bytes, not in bits.

Endian Examples The hexadecimal value 0x01020304 01 02 03 04 04 03 02 Big endian address 01 02 03 04 100 100 101 102 103 byte address Little endian address 04 03 02 01 100 100 101 102 103 byte address

MIPS Endianness ISA Supports either As a result we’ll use both the MIPS simulator we will use uses the host endianness, in our case LITTLE our mips machine uses BIG endian