Presentation is loading. Please wait.

Presentation is loading. Please wait.

Chapter 10 Instruction Sets: Characteristics and Functions Felipe Navarro Luis Gomez Collin Brown.

Similar presentations


Presentation on theme: "Chapter 10 Instruction Sets: Characteristics and Functions Felipe Navarro Luis Gomez Collin Brown."— Presentation transcript:

1 Chapter 10 Instruction Sets: Characteristics and Functions Felipe Navarro Luis Gomez Collin Brown

2  The complete collection of instructions that are understood by a CPU  Machine Code  Binary  Usually represented by assembly codes

3  Operation code (Op code)  Do this  Source Operand reference  To this  Result Operand reference  Put the answer here  Next Instruction Reference  When you have done that, do this...

4

5  In machine code each instruction has a unique bit pattern  For human consumption (well, programmers anyway) a symbolic representation is used  e.g. ADD, SUB, LOAD  Operands can also be represented in this way  ADD A,B

6

7  Data processing  Data storage (main memory)  Data movement (I/O)  Program flow control

8  3 addresses  Operand 1, Operand 2, Result  a = b + c;  May be a forth - next instruction (usually implicit)  Not common  Needs very long words to hold everything

9  2 addresses  One address doubles as operand and result  a = a + b  Reduces length of instruction  Requires some extra work  Temporary storage to hold some results

10  1 address  Implicit second address  Usually a register (accumulator)  Common on early machines

11  0 (zero) addresses  All addresses implicit  Uses a stack  e.g. push a  push b  add  pop c  c = a + b

12  More addresses  More complex (powerful?) instructions  More registers  Inter-register operations are quicker  Fewer instructions per program  Fewer addresses  Less complex (powerful?) instructions  More instructions per program  Faster fetch/execution of instructions

13  Operation repertoire  How many ops?  What can they do?  How complex are they?  Data types (Characteristics later…)  Different forms of data to which operations are performed  Instruction formats  Length of op code field  Number of addresses  Size of various fields

14  Registers  Number of CPU registers available  Which operations can be performed on which registers?  Addressing modes (later…)  RISC vs. CISC

15  Addresses  Numbers  Integer/floating point  Characters  ASCII etc.  Logical Data

16  Data Transfer  Arithmetic  Logical  Conversion  I/O  System Control  Transfer of Control

17  Specify  Source  Destination  Amount of data  Addressing mode (later…)  May be different instructions for different movements  e.g. IBM 390  Or one instruction and different addresses  e.g. VAX

18  Add, Subtract, Multiply, Divide  Signed Integer (Always provided for)  Floating point (Often provided for)  Packed decimals (Often provided for)  May include  Increment (a++)  Decrement (a--)  Absolute Value (|a|)  Negate (-a)  May involve data transfer operations

19  Bitwise operations  AND, OR, XOR, NOT, Equals Conversion Ex: Binary to Decimal. Decimal to Binary

20  Falls into the following categories:  Control and timing  Processor communication  Device communication  Data buffering  Error detection  May be specific instruction  May be done using data movement instructions (memory mapped)  May be done by a separate controller (DMA)

21  Executed only in a privileged state  CPU needs to be in specific state  Ring 0 on 80386+  Kernel mode  For operating systems use

22  Branch  e.g. branch to x if result is zero  Skip  e.g. increment and skip if zero  ISZ Register1  Branch xxxx  ADD A

23

24

25

26

27  What order do we read numbers that occupy more than one byte  e.g. (numbers in hex to make it easy to read)  12345678 can be stored in 4x8bit locations as follows

28 Provide four instructions to support procedure call/return  CALL  ENTER  LEAVE  RETURN A new Procedure call/return Push the return point on the stack Push the current frame pointer on the stack Copy the stack pointer as the new value of the frame pointer Adjust the stack pointer to allocate frame

29  AddressValue (1)Value(2)  1841278  1853456  1865634  1867812  i.e. read top down or bottom up?

30  The problem is called Endian  The system on the left has the least significant byte in the lowest address  This is called big-endian  The system on the right has the least significant byte in the highest address  This is called little-endian

31

32

33 1What are the typical elements of a machine instruction? 2What types of locations can hold source and destination operands? 3If an instruction contains four addresses, what might be the purpose of each address? 4What types of operands are typical in machine instruction set? 5What is the difference between an arithmetic shift and a logic shift? 6What is the difference between assembly language and machine language 7What is the difference between big endian and little endian? 8 List three places for storing the return address for a procedure return.

34 1Operation code, source operand reference, result operand reference and next instruction reference. 2 Register and memory. 3 Two operands, one result, and the address of the next instruction. 4 Address, character, numbers and logical data. 5 In logical shift, the bits of word are shifted left or right. Arithmetic shift treats the data as a signed integer and does not shift the sign bit.

35 6Assemble language uses symbolic names for addresses that are not fixed to specific physical address; this is not the case with machine language. 7 A multibyte numerical value stored with the most significant byte in the lowest numerical address. A multibyte numerical value stored with the most significant byte in the highest numerical address. 8 Register, start of procedure, top of stack


Download ppt "Chapter 10 Instruction Sets: Characteristics and Functions Felipe Navarro Luis Gomez Collin Brown."

Similar presentations


Ads by Google