DC trigger test Present layout Trigger electronics

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Presentation transcript:

DC trigger test Present layout Trigger electronics Experience with cosmic Experience at test beam

DC SuperB present-1 design SL1 SL2 SL3 SL4 SL5 SL6 SL7 SL8 SL9 SL10 TOT Planes 8 4 Type A U V #wires 172*4 204*4 1504 118*4 472 134*4 536 150*4 600 166*4 664 182*4 728 198*4 792 214*4 856 230*4 920 246*4 984 8056 #TSF 48 opt 32 10 12 13 14 16 17 18 20 21 173 #NBCD 2 1 1/2 15 #TSF 64 opt 24 9 11 132 #NDCB 64 opt 10/11 Number of wire could increase due to internal radius uncertainties. The 48 vs 64 depends on the form factor of the FE board used at the moment a conservative assumption has been made (i.e. 6U VME form factor)

BaBar Strategy (1)

BaBar Strategy (2) Serialization occurs here all DC hits on optical links with this strategy 64 links.

DC SuperB present design Super B detector 1504 wires from DC FE crate SL1 472 wires from DC FE crate SL2 536 wires from DC FE crate SL3 8056 wires from DC 600 wires from DC FE crate SL4 664 wires from DC FE crate SL5 728 wires from DC FE crate SL6 792 wires from DC FE crate SL7 856 wires from DC FE crate SL8 920 wires from DC FE crate SL9 984 wires from DC FE crate SL10 246 wires on SL10 is not what we would like to match the EMC sector in F. 240 would be better because in this case we would have 40 cells a perfect match with 9 degree EMC sector.

DC SuperB present design Test Discriminator needed @tbeam FE crate Super layer 10 • • • CPU DC FRONT END Discriminator DC FRONT END Discriminator DC FRONT END Discriminator copper/optical link copper/optical link copper/optical link ethernet link Input signals from DC front end 64 channels 64 channels 64 channels • • • • • discriminated signals In SuperB the discriminator board becomes a mez card and can be upgraded in order to compute TSFs and deliver them through a copper or optical link if there are radiation problems. Otherwise the «standard» solution would be welcome.

RF emulator needed @tbeam We have also built a ring oscillator to emulate RF when a machine trigger occurs. And a transition board to feed Virtex6 demo board with LVDS signals.

Some comments In our case we had the signal from BTF. This signal intrisically jiitters by 10 ns. The reason being that the BTF cathode emits 350 micro bunch with a 28 ps time distance. A single electron can belong to any of this micro- bunch. The RF from BTF starts the ring-oscillator which mimicks the RF.

Trigger setup Clocked discriminator discriminator ring oscillator

TSF (Track Segment Finder) 4 pattern for a fixed pivot tube. The other 4 pattern can be found via a parity transformation. So in this example there are 8 patterns per pivot tube and 4 pivot tubes. In total 32 combinations. 5 bits are enough to code the info. 14.8 MHz sampling means 74 Mbit/s link. P P P P

The prototype It consists of 8 layers. So it was natural from the trigger point of view to split it in two equivalent SLs. Only track candidate with all hits are here considered. At the moment we are investigating the problem delivering hits to an HPTDC

What we got on cosmic In our case 20 address per single multilayer

cosmics

#Tracks vs sampling frequency data Number of tracks Sampling frequency (MHz) addr1%addr2

Number of fired lookup tables (on cosmic)

Time correlation among hits cosmic Correlation in time the three hits with lowest time

Number of fired lookup tables (on data)

Time correlation among hits Correlation in time the three hits with lowest time

Resolution studies on cosmic more than 1 lookup tables fired RMS=15.15 counts i.e. 24 ns only 2 lookup tables fired RMS=17 counts i.e. 27 ns The algorithm is rather simple we assert the trigger on the basis of the first hit coincidence we have

Resolution studies on beam more than 1 lookup tables fired RMS=13.17 counts i.e. 21 ns only 2 lookup tables fired RMS=18.8 counts i.e. 30 ns