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The Totem trigger architecture The LONEG firmware archtecture

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Presentation on theme: "The Totem trigger architecture The LONEG firmware archtecture"— Presentation transcript:

1 The Totem trigger architecture The LONEG firmware archtecture
XI Pisa Meeting on Advanced Detectors - Isola d'Elba, Italy The TOTEM Modular Trigger System M.G.Bagliesia, M.Berrettia, R.Cecchia, V.Grecoa, S.Lamia, G.Latinoa, E.Oliveria, E.Pedreschia, A.Scribanoa, F.Spinellaa, N.Turinia a) University of Siena and INFN Pisa, Italy The TOTEM experiment will measure the total pp cross-section with the luminosity independent method and study elastic and diffractive scattering at the LHC. We are developing a modular trigger system, based on programmable logic, able to make, within few thousands of nanoseconds, on-line selection in order to select meaningful events to be stored and later analyzed by off-line algorithms. The trigger algorithm is based on a tree structure in order to obtain information compression. Starting from more than 2000 bits, in a first step we extract 6 bus data of 32 LVDS signals each and then we get a 1-bit decision (L1) and 16 information bits which could be sent to the CMS experiment global trigger system for common data taking in the future. Abstract The Totem trigger architecture Roman Pots (RP): silicon strips at 220 m and 147 m T1 detector: Cathode Strip Chambers (CSC) at 10m T2 detector: gas electron multiplier detectors (GEM) at 14m All three sub-detectors provide level one trigger building signals The trigger bits for T1 and T2 are transmitted optically, while for the Roman Pots the trigger signals are transmitted electrically (LVDS). CMS interaction point CMS cavern Front End Front End Front End Front End Front End The T1 detector sends its trigger bits directly to the counting room for further processing, T2 and the Roman Pots make use of programmable coincidence chips, which reduce the number of trigger bits to be transmitted to the counting room by an order of magnitude. Front End Front End Front End 192 bits 480 bits 208 bits 192 bits 208 bits 480 bits 192 bits 192 bits 2000 trigger building bits VFAT2 chip: 128 channels Digital output Hits info Trigger info (programmable) Trigger crate The three TOTEM detectors should be able to operate stand-alone or as sub-detectors of CMS. They need to provide trigger signals which are in time to generate a global trigger for the CMS experiment. TOTEM detectors should be triggered by their general trigger and data should be incorporated into their data acquisition. COUNTING ROOM TOTFED TOTFED TOTFED TOTFED TOTFED TOTFED RP 32 bits per pot 768 bits T1 16 bits per detector 960 bits T2 104 bits per quarter 416 bits The LONEG is: 6 TOTFEDs 32 32 32 32 the final trigger coincidence card a new mezzanine card, based on Stratix II Altera devices, plugged onto one of the 6 Host Boards inside the trigger crate 32 32 LONEG 1 TOTFED = 1 Host Board + Mezzanine cards 16 trigger bits to CMS Level-1 trigger StratixII FPGA The LONEG firmware archtecture Host Board with LONEG 32 bits Trigger Patterns From TOTFEDs Synch Module The HOST BOARD The TOTEM trigger system is a modular device: the main motherboard (known as “Host Board” ) can accept different mezzanine cards, developed ad hoc for different applications. LUT Mezzanine cards Host board functional blocks Based on Altera FPGA CMS-Trig bits 16 Link to the other 5 trigger HB Prescaler Scalers 16 S-Link output 16 16 16 or To CMS USB 2.0 Level 1 Trigger LONEG CONNECTIONS INPUTS IN-OUT From each Host Board: 32 trigger pattern bits 1 clock 12 bits bunch-counter VME interface (local bus) 16 trigger bits to CMS L1 (NIM and LVDS) S-Link LSD (92 pin) OUTPUTS Hi-Speed USB 2.0 NIM and LVDS L1 trig out


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