Materials and Devices for Neural Systems and Interfaces

Slides:



Advertisements
Similar presentations
MICROELECTROMECHANICAL SYSTEMS ( MEMS )
Advertisements

Display Systems and photosensors (Part 2)
Lecture 0: Introduction
Simplified Example of a LOCOS Fabrication Process
Carbon nanotube field effect transistors (CNT-FETs) have displayed exceptional electrical properties superior to the traditional MOSFET. Most of these.
GRAPHENE TRANSISTORS AND MEMORY. MOORE’S LAW THE PROBLEM 1. Reduction in saturation mode drain current. 2. Variation in Carrier velocity. 3. Modification.
Carbon Nanotube Electronics
Introduction to CMOS VLSI Design Lecture 0: Introduction
Chap. 5 Field-effect transistors (FET) Importance for LSI/VLSI –Low fabrication cost –Small size –Low power consumption Applications –Microprocessors –Memories.
Microelectronics & Device Fabrication. Vacuum Tube Devices Thermionic valve Two (di) Electrodes (ode)
ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING
Introduction Integrated circuits: many transistors on one chip.
EE141 © Digital Integrated Circuits 2nd Manufacturing 1 Manufacturing Process I Dr. Shiyan Hu Office: EERC 518 Adapted and modified from Digital Integrated.
Rochester Institute of Technology - MicroE © REP/LFF 8/17/2015 Metal Gate PMOS Process EMCR201 PMOS page-1  10 Micrometer Design Rules  4 Design Layers.
ES 176/276 – Section # 2 – 09/19/2011 Brief Overview from Section #1 MEMS = MicroElectroMechanical Systems Micron-scale devices which transduce an environmental.
ISAT 436 Micro-/Nanofabrication and Applications MOS Transistor Fabrication David J. Lawrence Spring 2001.
Z. Feng VLSI Design 1.1 VLSI Design MOSFET Zhuo Feng.
VFET – A Transistor Structure for Amorphous semiconductors Michael Greenman, Ariel Ben-Sasson, Nir Tessler Sara and Moshe Zisapel Nano-Electronic Center,
INTEGRATED CIRCUITS Dr. Esam Yosry Lec. #2. Chip Fabrication  Silicon Ingots  Wafers  Chip Fabrication Steps (FEOL, BEOL)  Processing Categories 
Nano/Micro Electro-Mechanical Systems (N/MEMS) Osama O. Awadelkarim Jefferson Science Fellow and Science Advisor U. S. Department of State & Professor.
1 Absolute Pressure Sensors Z. Celik-Butler, D. Butler and M. Chitteboyina Nanotechnology Research and Teaching Facility University of Texas at Arlington.
VLSI, Lecture 1 A review of microelectronics and an introduction to MOS technology Department of Computer Engineering, Prince of Songkla.
Metallization: Contact to devices, interconnections between devices and to external Signal (V or I) intensity and speed (frequency response, delay)
Lecture 0: Introduction. CMOS VLSI Design 4th Ed. 0: Introduction2 Introduction  Integrated circuits: many transistors on one chip.  Very Large Scale.
Chapter 4 Overview of Wafer Fabrication
Seminar ON SMART SENSOR Submitted by : SUBIR KUMAR GHOSH Roll No. IN-14/04 Electrical & Instrumentation Deptt. B.E 7th Semester JORHAT ENGINEERING COLLEGE,
Electronic device fabrication based on conducting polymer nanofibers: Motivating undergraduate students towards research in materials science Nicholas.
Field Effect Transistor. What is FET FET is abbreviation of Field Effect Transistor. This is a transistor in which current is controlled by voltage only.
EE141 © Digital Integrated Circuits 2nd Manufacturing 1 Manufacturing Process Dr. Shiyan Hu Office: EERC 731 Adapted and modified from Digital Integrated.
Fabrication Technology(1)
By: Joaquin Gabriels November 24 th,  Overview of CMOS  CMOS Fabrication Process Overview  CMOS Fabrication Process  Problems with Current CMOS.
Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 3, slide 1 Introduction to Electronic Circuit Design.
CMOS FABRICATION.
Saptarshi Das, PhD 2. Adjunct Birck Research Scholar Birck Nanotechnology Center Purdue University West Lafayette, Indiana Post-doctoral Research.
1 Device Fabrication And Diffusion Overview 5 and 8 February 2016 Silicon Wafer Production-Refer to Chapter “0” Prologue Raw material ― Polysilicon nuggets.
1. Introduction. Diseño de Circuitos Digitales para Comunicaciones Introduction Integrated circuits: many transistors on one chip. Very Large Scale Integration.
Conclusion An ACF bonding system dedicated for curved substrates has been set up and bonding of polyimide flexcable to curved glass has been successfully.
Government Engineering College,
• Very pure silicon and germanium were manufactured
Integrated Circuits.
On Wafer Ion Flux Sensors
MOSFET The MOSFET (Metal Oxide Semiconductor Field Effect Transistor) transistor is a semiconductor device which is widely used for switching and amplifying.
MOS Field-Effect Transistors (MOSFETs)
Etching Processes for Microsystems Fabrication
Manufacturing Process I
M. Mahdouani a, W. Boukhili a, C. Tozlu b, R. Bourguigaa
Riphah International University, Lahore
Lecture 7 Fundamentals of Multiscale Fabrication
Robert Vittoe1, Yici Jing2, Sejal Vagal3, and Mark Canner4
Metal nanoparticle embedded floating gate memory based on MoS2 with polymer tunneling dielectric layer. Myung Hun Woo1, Byung Chul Jang1, Junhwan Choi2,
Chapter 1 & Chapter 3.
MEMS, Fabrication Cody Laudenbach.
Meeting 指導教授:李明倫 學生:劉書巖.
6.3.3 Short Channel Effects When the channel length is small (less than 1m), high field effect must be considered. For Si, a better approximation of field-dependent.
SEMINAR 1. Title : Non-volatile memory device and application
EMT362: Microelectronic Fabrication CMOS ISOLATION TECHNOLOGY Part 1
Total Dose Response of HfSiON MOS Capacitors
منبع: & کتابMICROELECTRONIC CIRCUITS 5/e Sedra/Smith
T.-C. Chiang , University of Illinois at Urbana-Champaign
Manufacturing Process I
VLSI Lay-out Design.
V.Navaneethakrishnan Dept. of ECE, CCET
SILICON MICROMACHINING
Device Fabrication And Diffusion Overview
IC Fabrication Overview Procedure of Silicon Wafer Production
Manufacturing Process I
• Very pure silicon and germanium were manufactured
Device Fabrication And Diffusion Overview
Presentation transcript:

Materials and Devices for Neural Systems and Interfaces Sumedha Gandharava, Sepideh Rastegar, Catherine Walker, Justin Stadlbauer, Kurtis D. Cantley Department of Electrical and Computer Engineering, Boise State University Thin-Film Transistors (TFTs) Neural Interfaces Culturing SH-SY5Y human neuroblastoma cells on graphene-based micro electrode arrays (MEAs) Electrical characteristics of cells are accessed via patch clamp electrophysiology Overview Adaptable artificial neural networks with learning and pattern recognition Digital logic on flexible substrates Advanced electrical testing Wafer probing Custom high-performance neural network characterization Thin-film transistors for analog, digital, and memory Memristors Microelectrode arrays PECVD Nano-crystalline silicon (nc-Si) High-k metal oxides Metal nanoparticles Flexible polymers Materials Devices Circuits Testing Devices utilizing PECVD nano-crystalline silicon deposited at 250 °C or less Ambipolar operation for complementary circuits Fig. 4 Neuron Circuit fabricated using optical lithography (a) (b) (c) [111] peak [200] peak [311] peak Fig. 7 a) Illustration of neuron cells on active microelectrode sensor arrays. b) Contact pads using Au for graphene arrays. c) Illustration of hexagonal planar graphene structure. Fig. 3 Cross-section and 3-D view of a TFT(Top left and right). Drain current versus gate voltage of a TFT(Bottom left). Input current, voltage of the input capacitor, output voltage and spike frequency of a TFT(Bottom right). TFT Memories Fig. 1 Plasma Enhanced Chemical Vapor Deposited (PECVD) nc-Si X-ray diffraction f Fig. 8 Probe station constructed (Left), electrophysiology experiment with reservoir-mounted graphene MEA using SH-SY5Y (human neuroblastoma line) cell (Right and below) Use nanoparticles to trap charge over millisecond time scales Used for artificial neural circuits with biologically realistic synaptic learning Resistive Memory (a) (b) Two-terminal devices that change resistance based on past current flow (Memristors) (c) (a) Memristors provide long-term storage of synaptic weights Fig. 5 a) AFM of CVD graphene. b) AFM of Au nanoparticles on graphene and on SiO2 Support and Funding Nanoparticle memory TFT controls short-term learning (b) Force Office of Scientific Research (AFOSR) Young Investigator Program (YIP), grant FA9550-14-1-0188. Institutional Development Awards (IDeA) from the National Institute of General Medical Sciences of the National Institutes of Health under Grants #P20GM103408 and P20GM109095. Boise State Department of Electrical and Computer Engineering. (d) Flexible Electronics (e) Integration of specialized materials and devices onto mechanically flexible substrates Piezoelectric sensors from PVDF-TrFE copolymer Fig. 2 Memristor cross-sections (a) Metal-Metal contact (b) HfTiO active Layer (c) Metal-Semiconductor contact a-Si based Memristors (d) Finalized die (e) Vias on die using photolithography method. (f) I-V characteristic of a 2umx2um device (g) I-V characteristic of a 50umx50um device Fig. 6 a), b), and c) Polymer substrates such as PET, PEN, or polyimide can be bonded to a rigid Si carrier wafer using silicon (PDMS) for simplified processing (f) (g)