By Abhishek.S 8 th Sem,CS Under the guidance of Mrs. Annapurna B.E, MTech Lecturer of NIE

1. Integrated Circuit 2. Processors 3. Current Technologies 4. Reconfigurable processors Introduction 5. Multifunction Implementation 6. Architecture 7. Design Process 8. Compared To Other Technologies 9. Advantages 10. Disadvantages 11. Conclusion

In electronics, an integrated circuit (also known as IC, microcircuit, microchip, silicon chip, or chip) is a miniaturized electronic circuit (consisting mainly of semiconductor devices, as well as passive components) that has been manufactured in the surface of a thin substrate of semiconductor material. Integrated circuits are used in almost all electronic equipment in use today and have revolutionized the world of electronics. The integrated circuit was first discovered by Jack Kilby and Robert Noyce

Among the most advanced integrated circuits are the processors or "cores", which control everything from digital microwave ovens, to cellular phones to computers Advantages  Cost  Performance  Size

ASIC An application-specific integrated circuit (ASIC) is an integrated circuit (IC) customized for a particular use, rather than intended for general-purpose use.integrated circuit DSP Digital signal processing (DSP) is concerned with the representation of signals by a sequence of numbers or symbols and the processing of these signals signals FPGA A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by the customer or designer after manufacturing—hence "field-programmable".integrated circuitfield-programmable

Chips are prefabricated with logic blocks and interconnects. Logic and interconnects can be programmed (erased and re- programmed) by users. No fabrication is needed. Interconnects are predefined wire segments of fixed lengths with switches in between.

A reconfigurable processor is a microprocessor with erasable hardware that can rewire itself dynamically. This allows the chip to adapt effectively to the programming tasks demanded by the particular software they are interfacing with at any given time. While reconfiguring the chip, the connections inside the functional blocks and the connections in between the functional blocks are changing, that means when a particular software is loaded the present hardware design is erased and a new hardware design is generated by making a particular number of connections active while making others idle.

It takes just 20 microseconds to reconfigure the entire processing array. These new chips are able to rewire themselves on the fly to create the exact hardware needed to run a piece of software at the utmost speed. an example of such kind of a chip is a chameleon chip. This can also be called a “chip on demand” This will define the optimum hardware configuration for that particular software.

In a conventional ASIC or FPGA, multiple algorithms are implemented as separate hardware modules. Four algorithms would divide the chip into four functional areas. With Reconfigurable Technology, the four algorithms are loaded into the entire reconfigurable Fabric one at a time. First, the entire Fabric is dedicated to algorithm 1; during this processing time, algorithm 2 is loaded into the background place. In a single clock cycle, the entire Fabric is swapped to algorithm 2; during this processing time, algorithm 3 is loaded into the background plane. The entire reconfigurable fabric is dedicated to just one algorithm at a time. So finally the result is: much higher performance, lower cost and lower power consumption

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Components:  32-bit Risc ARC  64 bit memory controller  32 bit PCI controller  reconfigurable processing fabric (RPF)  high speed system bus  programmable I/O (160 pins)  DMA Subsystem  Configuration Subsystem

Chameleon RCP Architecture

 The Fabric provides unmatched algorithmic computation power to Chameleon Chip.  It consists of 84,32-bit Data path Units and 24, 16×24-bit Multipliers, Operating at 125Mhz, they provide up to 3, bit Million Multiply- Accumulates Per Second and 24, bit Million Operations Per Second.  The fabric is divided into Slices, the basic unit of reconfiguration.

The CS2112 has 4 Slices with 3 Tiles in each. Each tile can be reconfigured at runtime Tiles contain :  Datapath Units  Local Store Memories  16x24 multipliers  Control Logic Unit

The high-performance 32bit Data path Unit (DPU): The Tile includes seven Data path Units. The DPU is a data processing module that directly supports all C and Verilog operations. 8 user-definable instructions stored in Instruction memory Word length 32 bits, can also work on 4 8-bit and 2 16-bit data MPU – 16x24-bit or 16x16-bit single-cycle multiplications

Multi-ported, 32-bit by 128-word RAM Re-configurability: LSMs can be assembled into different memory configurations through programming. Common use: Quickly load data.

DPU Instructions – I/O routing – Shifting – Masking – Register enables – LSM read – LSM write – Flag generation – DPU Operator CLU – Implement a FSM to select DPU/MPU instructions

Design Process C/C++ Program Assembler Verilog Verilog to Binary Configuration Bits Hardware

FPGA and ASIC Design – Similar – RCP is completed when DPU and control functions are specified and mapped onto RCP. – After get net list, FPGA/ASIC still need floor planning, timing analysis, processor integration, place and route. – RCP tools runtime required only a few minutes – FPGA/ASIC tools runtime tend to be in hours DSP Design – Similar in use assembly language – RCP offer more parallelism and more flexibility

 increased performance and channel count  can more quickly adapt to new requirements and standards  lower development costs and reduce risk.  Reducing power  Reducing manufacturing cost.

 RCP designs requires comprehensive set of tools  'Learning curve' for designers unfamiliar with reconfigurable logic

These new chips called chameleon chips are able to rewire themselves on the fly to create the exact hardware needed to run a piece of software at the outmost speed. Its applications are in, data-intensive Internet,DSP,wireless base stations, voice compression, software-defined radio, high-performance embedded telecom and datacom applications, xDSL concentrators, fixed wireless local loop, multichannel voice compression, multiprotocol packet and cell processing protocols. Its advantages are that it can create customized communications signal processors,it has increased performance and channel count, and it can more quickly adapt to new requirements and standards and it has lower development costs and reduce risk.