1. Anne Pratoomtong ECE734, Spring2002
A survey on Reconfigurable Computing for Signal Processing Applications
Anne Pratoomtong
ECE734, Spring2002

2. Motivation
Adaptability under a variety of execution environment and constraints.
Development of a Robust-Large Scale signal Processing System for operation in complex non-stationary environment.
Cost and flexibility.
Adaptability under a variety of constraints such as changes in statistics of signals and noise, weather, transmission rates, or communication standards.
Development of a Robust-Large Scale signal Processing System for operation in complex non-stationary environment. In this case, GPP multiprocessor system is not a good candidate since signal-processing system tend to have a regular loop structure that can be execute efficiently in simple but highly parallel processing element.
Reconfigurable platform enable many applications to map into a single hardware platform. This can save a lot of engineering development cost compare to ASIC. It also allow the designer to easily design the system to match the design goal such as power, performance.

3. Reconfigurable computing
Pre-Runtime Reconfigurable
Run-time Reconfigurable (RTR)
-FPGAs base RTR
-Structure Adaptive RTR

4. Pre-Runtime Reconfigurable
Computing system or device logic functionality and interconnect can be customized to suit a specific application through post-fabrication, user-defined programming.
Hardware Platform contains a mix variety of macro module with different characteristic connected via reconfigurable communication network.
Hardware Platform contain a mix variety of macro module with different characteristic (Performance, cost, power, flexibility, programmability) connected via reconfigurable communication network. The adaptation occurs upon the change of application. That is, given an application, the synthesis tool explores the possible design space and chooses the appropriate configuration to achieve high-performance or low power. The hardware platform is then reconfigure to the configuration result from the synthesis tool. The devices with Pre-runtime reconfigurable capability are useful when changing standards, communication protocols, computing algorithms, or applications.

5. Run-time Reconfigurable (RTR)
System logic and/or interconnect functionality can be modified during application execution.
Useful for DSP applications whose performance and functionality depend on run-time factors such as time-varying noise, runtime environment, computation resources available, or time-varying data set.

6. Conclusion
RTR system does not fully utilize the ability to change the structure of the hardware reconfigurable component such as FPGA
Multiple computing hardware Vs Single computing hardware.
Hardware reconfiguration for the RTR system largely occur during the compile phase.
RTR system does not fully utilize the ability to change the structure of the hardware reconfigurable component
This is largely due to high reconfiguration time. Most of the processes of hardware reconfiguration for the RTR system are occur during the synthesis phase where the real time requirement does not effect the performance and thus, can be relaxed. During the runtime, the reconfiguration occurs in the form of changing the operating mode. The hardware reconfiguration activities in runtime phase are as simple as changing the control signal to select between the different hardware configuration which are already been pre-configure in the synthesis phase to handle the change of run time environment.
Multiple computing hardware Vs Single computing hardware
The need of RTR is gone when the designer chose the implementation platform which consist of multiple computing hardware rather than single computing hardware. The performance factor for the 2 choices depends on communication speed and synchronization overhead VS reconfigurable overhead, area, and power constraint. In general, the single hardware implementation leads to a more power-area effective system.
Hardware reconfiguration for the RTR system largely occur during the compile phase
Hardware reconfiguration for the RTR system largely occur during the synthesis phase where the real time requirement does not effect the performance. During the runtime, the reconfiguration only occurs in the form of changing the operating mode to minimized the reconfiguration overhead.