Combinational Logic Weiqiang Sun. A brief review Logic gates Logic gates AND, OR, NOT AND, OR, NOT NAND, NOR, XOR, XNOR NAND, NOR, XOR, XNOR Boolean algebra.

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Presentation transcript:

Combinational Logic Weiqiang Sun

A brief review Logic gates Logic gates AND, OR, NOT AND, OR, NOT NAND, NOR, XOR, XNOR NAND, NOR, XOR, XNOR Boolean algebra Boolean algebra Rules and axioms Rules and axioms Analysis of logic circuits Analysis of logic circuits DeMorgan’s Theorem DeMorgan’s Theorem Standard forms of Boolean expressions Standard forms of Boolean expressions K-Map K-Map

A brief review – continued… Functions of combinational logic Functions of combinational logic Adders Adders Comparators Comparators Decoders Decoders Encoders Encoders Code converters Code converters Multiplexers Multiplexers Parity Generator/checkers Parity Generator/checkers

Problem With logic gates, design a logic circuit to check whether the blood plasma type of the donor is compatible with that of the recipient. With logic gates, design a logic circuit to check whether the blood plasma type of the donor is compatible with that of the recipient.

Repeat the previous problem with the blood compatibility table below. Repeat the previous problem with the blood compatibility table below.

Problem Implement a full subtractor with logic gates. Implement a full subtractor with logic gates.

Problem Repeat the problem with 3-line to 8-line decoders and NAND gates. Repeat the problem with 3-line to 8-line decoders and NAND gates.

Problem Design a logic circuit that converts BCD to excess-3 codes Design a logic circuit that converts BCD to excess-3 codes

Problem Repeat the previous problem with a 4-line to 16-line decoder and necessary gates Repeat the previous problem with a 4-line to 16-line decoder and necessary gates

Problem Repeat the problem with 1-out-of-16 multiplexers (data selector). Repeat the problem with 1-out-of-16 multiplexers (data selector).

Problem Repeat the problem with 1-out-of-8 multiplexers (data selector). Repeat the problem with 1-out-of-8 multiplexers (data selector).

Homework 1.Design a 5-line to 32-line decoder with 74LS138 and 74LS Implement the following logic function with 74LS138 and NAND gate a.F=Σ X,Y,Z (2,4,7), b.F=Σ A,B,C,D (2,4,6,14) 3.Repeat problem 2 with 74X151