1. Part 4
Combinational
Logic

2. Combinational Circuits

3. Combinational Circuits

4. Analysis Procedure

5. Analysis Procedure

6. Analysis Procedure

7. Analysis Procedure

8. Analysis Procedure

9. Analysis Procedure

10. Analysis Procedure

11. Analysis Procedure

12. Analysis Procedure BC A
-So, it is a Full Adder circuit

13. Design Procedure

14. Design Procedure CD CD AB AB CD CD AB AB

15. Design Procedure
-Using Common, 2-input gates

16. Seven-Segment Decoderyz wx

17. Binary Adder
S = x’y + xy’ = x y
C = xy

18. Binary Adder
= xy + xy’z + x’yz yz yz x x yz yz x

19. Binary Adder

20. Binary Adder

21. Binary Adder

22. Binary Subtractor

23. Binary Adder/Subtractor

24. Binary Multiplier
Multiplication of binary numbers is performed in the same way as in decimal numbers
– partial product: the multiplicand is multiplied by each
bit of the multiplier starting from the least significant bit

25. Binary Multiplier

26. Magnitude Comparator

27. Magnitude Comparator

28. Decoders

29. Decoders

30. Decoders

31. Decoders

32. Decoders

33. Decoders

34. Implementation Using Decoders

35. Implementation Using Decoders

36. Encoders

37. Encoders

38. Priority Encoders

39. Encoder / Decoder Pairs

40. Multiplexers

41. Multiplexers

42. Multiplexers

43. Multiplexers

44. Implementation Using Multiplexers

45. Implementation Using Multiplexers

46. Implementation Using Multiplexers

47. Implementation Using Multiplexers

48. Multiplexer Expansion

49. DeMultiplexers

50. Multiplexer / DeMultiplexer Pairs

51. DeMultiplexers / Decoders