1. DIGITAL LOGIC ELECTRICITY, GATES, COMPONENTS

2. DIGITAL LOGIC READING: APPENDIX C THROUGH C.3 The Student shall be able to: Define voltage, current, resistance, volts, amps, ohms. Recite ohm’s law Draw the symbol for AND, OR, XOR, NAND, NOR, NOT. Write mathematical statements using AND, OR, XOR, NOT. Prepare a truth table. Prepare a truth table for AND, OR, XOR, NOT. Design a circuit using Sum of Products. Design an efficient solution using a Karnaugh Map or K-Map. Define decoder, multiplexor, parity, adder, and recognize their circuit diagrams. Design a circuit with Logic Circuit

3. ELECTRICITY Voltage = Depth Current = Speed Resistance = Work or Obstructions voltage current resistance

4. RESISTANCE: MEASURED IN OHMS Ω

5. Voltage => Volts = V Current => Amperes = Amps = A Resistance => Ohms = Ω ELECTRICITY: NOTATION

6. Voltage = Current * Resistance (V=IR) Resistance = Voltage/Current (R=V/I) Example: Given: Voltage = 10 V Resistance = 1k Ω What is Current? Current = I = V/R = 10/1000 = 1/100 = 0.01 A =10 mAmps OHM’S LAW: V=IR

7. ELECTRONIC BREADBOARD

8. Notch = Direction VCC =Power GND = Ground 4 NAND Gates DIP Package A DIGITAL LOGIC CHIP

9. OR, AND, NOT

11. AND: ∙ & EXAMPLE: 1 ∙ 0 = 0 ◦ Truth Table 01 000 101

12. OR: + EXAMPLE: 1 + 0 = 1 Clock Alternates – 1 - 0 + Truth Table 01 001 111

13. XOR EXAMPLE: 1 XOR 0 = 1 Clock Alternates – 1 - 0 XOR Truth Table 01 001 110

14. ADDITIONAL ELECTRONIC GATES

15. LED DISPLAY TopBottom Left Top RightTop Left Bottom RightMiddle BottomPeriod

16. BUILDING DIGITAL COMPONENTS Multiplexor Adder Decoder

17. MULTIPLEXER - DEMULTIPLEXER Multiplexer Demultiplexer selector

18. MULTIPLEXER: SELECTS ONE INPUT A B S How is the solution provided mathematically? Out

19. MULTIPLEXER: SELECTS ONE INPUT A B S Out Out = (A  !S) + (B  S)

20. A, B: Input bits S: Sum S = A XOR B C: Carry C = A & B Notice there is no Carry-in HALF ADDER

21. FULL ADDER

23. ENCODER - DECODER Encoder Decoder Input Output

24. DECODER Decoder InputOutput 00000000001 00100000010 01000000100 01100001000 10000010000 10100100000 11001000000 11110000000

25. DECODER: SUMS OF PRODUCT SOLUTION InputOutput 00000000001 00100000010 01000000100 01100001000 10000010000 10100100000 11001000000 11110000000 2 1 0 7 6 5 4 3 2 1 0

26. DESIGNING A CIRCUIT 1.Define the Truth Table 2.Write Sum of Products 3.Optimize 4.Develop circuit Example: Parity

27. PARITY Used in Data Communications, RAID disk systems Even Parity Example: Each Byte sums to even number of 1-bits 0000000 -> 0 1111111 -> 1 0101010 -> 1 1000001-> ? Odd Parity Example: Each 3 bits sums to odd number of 1-bits 00-> 1 10 -> 0 11-> ? Enables ERROR CHECKING, Sometimes ERROR CORRECTION

28. STEP 1: PROVIDE TRUTH TABLE EVEN PARITY: OUTPUT ASSURES EVEN 1 DIGITS Input1Input2Input3 000 001 010 011 100 101 110 111

29. STEP 2: WRITE SUM OF PRODUCTS

30. STEP 3: OPTIMIZE LAWS Commutative Law: A+B = B+A AB = BA Associative Law: A+(B+C)=(A+B)+C A(BC) = (AB)C Distributive Law: A(B+C) = AB + AC BOOLEAN ALGEBRA

31. STEP 4: DEVELOP CIRCUIT … LOGIC CIRCUIT

32. Green = 01 Yellow = 10 Red = 00 Succession: Green 01 -> Yellow 10 Yellow 10 -> Red 00 Red 00 -> Green 01 TRAFFIC LIGHT

33. TRAFFIC LIGHT: DESIGN STEP 1: PROVIDE TRUTH TABLE IN0IN1OUT0OUT1 0001 0110 1000 STEP 2: WRITE SUM OF PRODUCTS

34. OPTIMIZATION: KARNAUGH MAPS (K-MAPS) AN OPTIMIZATION TECHNIQUE

35. TRAFFIC LIGHT: DESIGN STEP 1: PROVIDE TRUTH TABLE IN0IN1OUT0OUT1 0001 0110 1000 STEP 2: DEVELOP K-MAP Out0 01 00 Out1 10 00

36. COMPARISON: TRUTH TABLE VS. K-MAP TRUTH TABLE Left columns: Input Right columns: Output KARNAUGH MAP IN0IN1OUT0OUT1 0001 0110 1000 Out0 01 00

37. CD 0011 1111 AB1111 0100 SOLVING A K-MAP WITH 4 INPUTS

38. Input 1 Input 2 Input 3 000 001 010 011 100 101 110 111 EVEN PARITY: OUTPUT ASSURES EVEN 1 DIGITS CONVERT TO K-MAP 01 10 01 10

39. EVEN PARITY: OUTPUT ASSURES EVEN 1 DIGITS ANALYZE K-MAP 01 10 01 10

40. OPTIMIZED PARITY IMPLEMENTATION OPTIMIZED: 6 GATES; ORIGINAL 8 GATES:

41. CONCLUSION DEFINITIONS Electricity: V = I R Symbols: AND, OR, NOR, XOR, NAND, NOR Equation Form Gate Form Components: Multiplexer, Decoder, Parity, Adder DESIGNING LOGIC 1.Define Truth Table 2.Analyze  Write Sum of Products  Use Karnaugh Map  Optimize in other ways 3.Develop Circuit