Flip Flops 3.1 Latches and Flip-Flops 3 ©Paul Godin Created September 2007 Last Edit Aug 2013
Flip Flops 3.2 Edge-Triggered Devices ◊Up to now we have looked at two digital values or states: 1 and 0 ◊There are also two dynamic digital values or states: ◊rising edge (positive edge) ◊falling edge (negative edge) positive edge negative edge 1 0 0
Flip Flops 3.3 Edge-Triggered Devices ◊Inputs to some devices will respond only to a dynamic state. ◊This is known as an edge input or a clock input. ◊The symbol is a triangle at the input. Positive Edge Negative Edge
Flip Flops 3.4 Edge-Triggering Notation ◊Positive Edge: ◊PGT (positive going transition) ◊PT (positive transition) ◊P ◊Negative Edge: ◊NGT (negative going transition) ◊NT (negative transition) ◊N
Flip Flops 3.5 Advantages of Edge-Triggered Devices ◊Edge-Triggered devices are important for many applications, including: ◊Counters ◊Clocks ◊Timers ◊Digital meters ◊Sequential circuits ◊Mathematical operations, … ◊Shift Registers ◊Memory ◊Data communications ◊Logic operations ◊Mathematical operations, …
Flip Flops 3.6 Edge-Triggered D Flip Flop ◊The edge-triggered D-Flip Flop will only read its input when the edge is received. ◊“With an enabling edge, the Q output follows the D input”. D Q Q Clock EnDQQ’Mode 001Reset 110Set 1XQQ’Hold 0XQQ’Hold XQQ’Hold This is one memory cell in computer applications
Flip Flops 3.7 Edge-Triggered SR ◊The edge triggered SR is not very popular. ◊The only difference between the SR Latch and the edge-triggered SR is that it will read its input only when it receives the active edge.
Flip Flops 3.8 Edge-Triggered SR Flip Flop ClkSRQQ’Mode 00QQ’Hold 0101Reset 1010Set 1100Invalid 0XXQQ’Hold 1XXQQ’Hold XXQQ’Hold S R Q Q Clk
Flip Flops 3.9 Edge-Triggered JK Flip Flop ◊The JK Flip Flop is a device that functions like an edge-triggered SR latch. ◊The only exception: toggle state on two active inputs. ◊Toggle means go to the complimentary (opposite) output state. This is a very useful function.
Flip Flops 3.10 Edge-Triggered JK Flip Flop ClkJKQQ’Mode 00QQ’Hold 0101Reset 1010Set 11Q’QToggle 0XXQQ’Hold 1XXQQ’Hold XXQQ’Hold J K Q Q Clk
Flip Flops 3.11 Toggling Toggling has important applications including counters and frequency dividers. A “T” Flip-Flop has a clock input only. The output will toggle on an input edge. T Q Q Clk
Flip Flops 3.12 Exercise 1: Edge-Triggered D Flip Flop Complete the table D Q Q Clock EnDQQ’Mode 0 1 1X 0X X
Flip Flops 3.13 Exercise 2: Edge-Triggered JK Flip Flop ClkJKQQ’Mode XX 1XX XX J K Q Q Clk Complete the table
Flip Flops 3.14 Exercise 3: D Flip Flop timing diagram Complete the timing diagram D Q Q Clk D Q Q Clock
Flip Flops 3.15 Exercise 4: JK Flip Flop timing diagram J K Q Q Clk Complete the timing diagram J K Q Q Clk
ASYNCHRONOUS INPUTS Flip Flops 3.16
Flip Flops 4.17 Input Types Flip-Flops have 2 types of inputs: ◊Synchronous ◊Waits for a clock input to change the state. ◊Asynchronous ◊Immediate change to the outputs without waiting for a clock pulse. Overrides the synchronous inputs.
Flip Flops 4.18 Examples of Asynchronous Inputs The preset and clear are asynchronous inputs. The J, K and Clock inputs are synchronous inputs.
Use of Asynchronous Inputs ◊Asynchronous inputs are used to force an immediate set or reset output to a single flip- flop or a group of flip-flops. ◊Active asynchronous outputs inhibit synchronous inputs. Flip Flops 4.19
Flip Flops 4.20 Asynchronous Immediate Synchronous On clock edge Remember
Flip Flops 4.21 JK ASYNCHRONOUS FLIP-FLOP
Flip Flops 4.22 D Flip Flop with asynch inputs ClkDPreClrQQ’Mode 01101Reset 11110Set 1X11QQ’Hold 0X11QQ’Hold X11QQ’Hold XX0110Preset XX1001Clear XX00??Invalid D Q Q Clock Preset Clear Synchronous Asynchronous Typically, active preset and clear generates a 1-1 output
Question ◊What often happens if the asynchronous inputs of a flip-flop are left floating? ◊Do asynchronous inputs need to be debounced? Flip Flops 4.23
Flip Flops 3.24 Exercise 5: JK Flip Flop timing diagram Complete the timing diagram J K Q Q Clk J K Q Q
Flip Flops 3.25 END © GMAIL.COM