1. Embedded Systems Design 1 Lecture Set C Interfacing the MCS-51 to: –D/A Converter –A/D Converter

2. Embedded Systems Design 2 Digital-to-Analog Conversion How can we convert a multi-bit digital value into an analog quantity whose relative value corresponds to the digital quantity? The general form of a Digital-to-Analog Converter (DAC) is:

3. Embedded Systems Design 3 General Concept of DAC Each digit in the digital value switches a weighted current on or off with the current of the MSB being the largest. –The second MSB produces a current half as large, and so on. All of the current sum at the operational amplifier’s negative input. –The total current is given by: –The bit values b0, b1,..., bn can be only 0 or 1. The function of each bit is to include or exclude a term from the general expression. The op amp with its feedback resistor act as a current-to- voltage converter.

4. Embedded Systems Design 4 The Resistor Network There are two main techniques: –Weighted resistor network –R-2R resistor network. Both technique depend on translating the voltage of each bit into a relative current. Then the currents are summed and translated into voltage.

5. Embedded Systems Design 5 Weighted Resistor Network The MSB has a resistor value of R. Successive bits have resistor values that double with each bit: 2R, 4R, and 8R. The branch currents decrease by halves with each descending bit value.

6. Embedded Systems Design 6 Weighted Resistor Network The bit inputs, b 3, b 2, b 1, and b 0, are either 0 V or V CC. When the corresponding bits are HIGH, the branch currents are: –I 3 = V CC / R –I 2 = V CC / 2R –I 1 = V CC / 4R –I 0 = V CC / 8R The sum of branch currents gives us the analog current I a. Given that V O = - I a R f, and R f = R / 2,

7. Embedded Systems Design 7 Weighted Resistor Network The weighted resistor DAC is seldom used in practice. One reason is the wide range of resistor values required for a large number of bits. Another reason is the difficulty in obtaining resistors whose values are sufficiently precise.

8. Embedded Systems Design 8 R-2R Ladder Network Another DAC circuit, the R-2R ladder, is more commonly used. It requires only two values of resistance for any number of bits.

9. Embedded Systems Design 9 R-2R Ladder Network It can be shown using the Thevenin theorem and the principle of superposition that each bit is a separate voltage source and that the MSB, b7, is equal to VCC/2, the next to MSB, b6, is equal to VCC/4; b5=VCC/8 and so on to b0=VCC/256. This circuit is expandable to any number of bits simply by adding one resistor of each value for each bit.

10. Embedded Systems Design 10 Analog-to-Digital Conversion Analog-to-Digital Converters (ADC) are mainly composed of three basic building blocks: –D/A Converter (DAC) –Comparator –Control logic The operating concept is: –Generate an estimate of the digital representation of the analog signal. –Convert the digital estimate to an analog estimate using the DAC. –Compare the analog estimate with the true analog signal. –Make an adjustment to the digital estimate. –Repeat until the estimate is within an acceptable “resolution” limit.

11. Embedded Systems Design 11 Analog-to-Digital Conversion Concepts Digital information is different from its continuous counterpart in two important respects: it is sampled, and it is quantized. Both of these restrict how much information a digital signal can contain. An analog signal is a signal with an amplitude that varies continuously for all time. –In other words, at a given time instant an analog signal can take on any value (theoretically infinite number of values).

12. Embedded Systems Design 12 Analog Signal Example

13. Embedded Systems Design 13 Discrete Time Signals A discrete-time signal is defined for only discrete instants of time. In other words, the "time variable" of the signal may take on only certain values. The process of converting an analog signal into a discrete-time signal is called sampling. Sampling converts the independent variable (time in this example) from continuous to discrete. A discrete time signal is sometimes called a sampled signal. Discrete-time signals are represented as a sequence of samples (real-valued numbers).

14. Embedded Systems Design 14 The Discrete Time Signal

15. Embedded Systems Design 15 The ADC Process The ADC will translate a continuous time signal into a discrete time signal by sampling it at specific intervals. These samples become the input to the ADC –The ADC then follows the steps discussed earlier to generate the digital representation of the samples. This process is called quantization of the samples. The process continues for a certain period of time. –The result is a sequence of digital values that will represent the analog signal values during the given time period.

16. Embedded Systems Design 16 Characterizing ADC An ADC is characterized by its range and its resolution. –The range refers to the smallest and largest number the ADC can convert. The range is a function of the circuitry used to construct the ADC. –The resolution refers to the number of bits used to represent a sample value. The higher the number of bits the more accurately an analog value can be reconstructed from its binary representation.

17. Embedded Systems Design 17 Quantization To complete the analog-to-digital conversion the amplitude values of the discrete-time signal have to be converted into discrete values. –This process is called quantisation. For example, both 2.56000 volts and 2.56001 volts of an input voltage will be converted into digital number 2560. –During the process of quantization, we lose a little bit of accuracy.

18. Embedded Systems Design 18 Quantization Error A digital number can take only specific values. If the analog value we are attempting to quantize does not exactly match one of these values, it has to be “forced” to match. –Therefore, some error will be generated. The amount of this quantization error will depend on the difference between each two consecutive digital values. –This in turn will depend on the number of bits in the digital representation. The more bits there are, the smaller the difference between the successive values.

19. Embedded Systems Design 19 ADC Resolution The number of bits that the ADC uses to represent the analog signal is its resolution. The higher the resolution, the higher the number of divisions the range is broken into, and therefore, the smaller the detectable voltage change. The figure shows a sine wave and its corresponding digital image as obtained by an ideal 3-bit converter. A 3-bit converter divides the analog range into 2 3, or 8 divisions.

20. Embedded Systems Design 20 Accuracy of Representation The accuracy of representation depends on the resolution of the ADC. The smallest voltage increment distinguishable by and ADC is given by: So, for a 3-bit ADC with a range of  5V, we get: If we use a 16-bit ADC instead, we get:

21. Embedded Systems Design 21 The Complete ADC Process

22. Embedded Systems Design 22 ADC Implementations Counting ADC –A counter is used to generate and update the digital guesses. –For every new value, the counter is initialized to 0 and counts up until the digital value is within the resolution accuracy of the analog value. 775556

23. Embedded Systems Design 23 ADC Implementations Successive Approximation ADC –Made up of a counter or register, a digital to analog converter, and a comparator. –Algorithm: The MSB of the counter is set, then the analog result is compared to the input. –If the input is larger than the analog guess, the MSB stays on, and the next bit down is tried. –If the input is smaller than the analog guess, the MSB is turned off, and the next bit down is tried. The process continues until all bits are attempted. –Conversion time: n clock cycles. Where n is the number of bits.

24. Embedded Systems Design 24 Successive Approximation ADC

25. Embedded Systems Design 25 Successive-approximation method Successive Approximation ADC Given an 8-bit ADC whose range is 0-15 V, determine the correct encoding for 5 volts. 01000000 ½(V max – V min ) = 7.5 volts V max = 7.5 volts. ½(7.5 + 0) = 3.75 volts V min = 3.75 volts. 1000000001100000 ½(7.5 + 3.75) = 5.63 volts V max = 5.63 volts ½(5.63 + 3.75) = 4.69 volts V min = 4.69 volts. 01010000 ½(5.63 + 4.69) = 5.16 volts V max = 5.16 volts. 01011000 ½(5.16 + 4.69) = 4.93 volts V min = 4.93 volts. 01010100 ½(5.16 + 4.93) = 5.05 volts V max = 5.05 volts. 01010110 ½(5.05 + 4.93) = 4.99 volts 01010101

26. Embedded Systems Design 26 ADC Implementations Flash ADC –For an n-bit converter, use 2n-1 comparators and 2n-1 reference voltages. Compare the analog input to all 2n-1 reference voltages at the same time. –Only one comparator will produce a match. Pass the output of all comparators to an encoder. –The code for the active input (the matching comparator) will be produced on the output. –Conversion speed: 1 clock cycle. –Very expensive.

27. Embedded Systems Design 27 Flash ADC

28. Embedded Systems Design 28 ADC Chips ADC - 804 –Microprocessor compatible –Single voltage supply (+5V) operation, –Differential analog inputs. 0 - 5V input voltage (Vin+, Vin-) –Variable input voltage range (Pin Vref/2) –Internal Clock Generator (RC on CLK IN, CLK R pins) –Pins CS – Chip Select, active low RD – Read Digital data from ADC, H-L edge triggered WR – Start conversion, L-H pulse edge triggered INTR – end of conversion, Goes low to indicate conversion done Data bits – D0-D7

29. Embedded Systems Design 29 ADC Chips ADC 804 –Resolution – 8 bits –Conversion Time – Greater than 110  s –Input Voltage range – Default 0-5V. Can be changed by setting different value for Vref/2 pin –Range = 0 to 2x Vref/2 –Step Size  Smallest change (2 x Vref/2)/ 256

30. Embedded Systems Design 30 Interfacing ADC 804 to 8051 Signals to be interfaced (on the ADC 804) –D0-D7, RD, WR, INTR, CS IO Mapping (easiest) –Connect D0-D7, RD, WR, CS, INTR to some port bits on the 8051 (12 in all). CS may be unused for IO mapped operation Memory Mapping –Connect D0-D7 of ADC 804 to the data bus of the 8051 system –Connect RD, WR of the ADC 804 to the 8051 system (ensure polarity) –Connect CS of ADC 804 to an appropriate address decoder output –Connect INTR of ADC 804 to an external interrupt Pin on the 8051 (INT0 or INT1)

31. Embedded Systems Design 31 Using an ADC 804 with the 8051 IO Mapped  P1 to D0-D7, P2.5 to RD, P2.6 to WR, P2.7 to INTR ADC_IO: mov P1, #0xFF ;make P1 input setb P2.5 ;RD=1 clr P2.6 ;WR=0 setb P2.6 ;WR=1 WAIT: jb P2.7, WAIT ;wait for INTR clr P2.5 ;RD=0 mov A, P1 ;read digital o/p ret

32. Embedded Systems Design 32 DAC Chips Commonly used DAC 808 (MC1408) –R/2R ladder –I out = I ref (D7/2 + D6/4 + D5/8 + …… + D0/256) –I out converted to voltage by a resistive load or op-amp based isolator (R f from V out to V- and V+ to GND) Pins – Check with the datasheet for setting up the reference current –D0-D7  Connected to the Processor’s IO port Usage: –Just write a byte to the IO port and the DAC converts it to an analog value Some 8051 clones have ADCs and DACs in built

33. Embedded Systems Design 33 Thanks for a Challenging Semester THE END