2Analogue Digital Conversion Analog and digital data were briefly mentioned at the startA digital signal is an approximation of an analog oneLevels of signal are sampled and converted to a discrete bit pattern.Digital signal processing is used, for example, to enhance and compress images, to process sounds to generate speech, etc, etc.
3Step (discrete) Approximation “stair-step” approximation of original signalsamplelevelmore samples give greater accuracytimehold time for sample
4ObjectivesTo understand how a digital value can be converted to an analogue valueTo draw circuits and explain the operation of two digital to analogue converters: the binary weighted resistor network and the R-2R ladder networkTo draw the block diagram and explain the operation of three analogue to digital converters: flash, counter ramp and successive approximationTo be able to calculate the conversion time for an analogue to digital converterTo be able to explain the sampling ruleTo be able to describe the basic design of a sample and hold circuit and explain how it works
5The binary weighted resistor network Comprises of a register and resistor networkOutput of each bit of the register will depend on whether a 1 or a 0 is stored in that positione.g. for a 0 then 0V outputfor a 1 then 5V outputResistance R is inversely proportional to binary weight of each digitRMSB4-bit register2RRLVL4R8RLSB
6Buffering the resistor network Best solution is to follow the resistor network with a buffer amplifierHas high impedance, practically no current flowsAll input currents sum at S and go through RfVo = -IfRfV=-IR=-(I+I+I+I)Roff1234f
7Digital-to-Analogue Example Calculate the output voltage for an input code word 0110 if a logic 1 is 10V and a logic 0 is 0V, and R = RF=1kI1 = I4 = 0I2 = 10v / 2R = 10 / 2k = 5 mAI3 = 10v / 4R = 10 / 4k = 0.25 mAVo = -If x Rf = -(0.0075) x 1000 = -7.5 voltsV=-IR=-(I+I+I+I)Roff1234f
8The binary weighted resistor network Seldom used when more than 6 bits in the code wordto illustrate the problem consider the design of an 8-bit DAC if the smallest resistor has resistance Rwhat would be the value of the largest resistor?what would be the tolerance of the smallest resistor?Very difficult to manufacture very accurate resistors over this range
9The R-2R Ladder Resistor Network Has a resistor network which requires resistance values that differ 2:1 for any sized code wordThe principle of the network is based on Kirchhoff's current ruleThe current entering N must leave by way of the two resistors R1 and R2•
10The R-2R Ladder Resistor Network Works on a current dividing networkResistance to right of B = 1/(1/2R + 1/2R)Resistance to right of A = R +2R/2 = 2RCurrent divides I1 = I/ I2 = I/4 divides again
11The R-2R Ladder Resistor Network The network of resistors to the right of A have an equivalent resistance of 2R, and so the right hand resistance can be replaced by a copy of the networkBit Current3 I/22 I/41 I/80 I/16bit bit bit bit 0
12The R-2R Ladder Resistor Network The state of the bits is used to switch a voltage sourceV=-R(bI2+bI4+bI8+bI16)1of32
13ExampleV=-R(bI2+bI4+bI8+bI16)1of32For the circuit shown above with I = 10 mA and Rf = 2k, calculate the output voltage V0 for an input code word 1110.
14Example I = 10mA Rf = 2k input code word 1110 Vo = -2000( 0.01/ / /8 + (0 x 0.1)/8 )= * ( ) / 8= 17.5 volts
15QuantisationSuppose we want to use a D-A converter to generate the sawtooth waveform (graph shown on the left)End up with stair-case waveform (graph shown on the right)The 16 possible values of the D-A converter output are called the quantisation levelsThe difference between two adjacent quantisation levels is termed a quantisation interval
16Quantisation ErrorDifference between the two waveforms is the quantisation errorMaximum quantisation error is equal to half the quantisation intervalOne way to reduce the quantisation error (noise) is to increase the number of bits used by the D-A converterquantisation interval111110101100011010001000bands or quanta1001100001110110010101000011001000010000samples
17Quantisation NoiseThe voltage produced by the DA convertor can be regarded as the original signal plus noise:This is the quantisation noise.
18SummaryWe have looked at techniques for converting a digital codeword into an analogue voltage using a weighted resistor network. In particular:the binary weighted network (not suitable for large resolution D-A converters)the R-2R ladderThe addition of an amplifier minimises the loading effects on the weighted networkThe conversion from digital to analogue involves a quantisation process that limits the resolution and introduces the quantisation noise.This quantisation error can be reduced by increasing the number of bits in the converter.