Download presentation

Presentation is loading. Please wait.

1
**EET 252 Unit 6 Analog-to-Digital Conversion**

Read Floyd, Section 12-1 and 12-2. Study Unit 6 e-Lesson. Do Lab #6. Homework #6 and Lab #6 due next week. Quiz next week. -Handouts: Slides 15 and 17 (which are Floyd’s Fig and 12.9) -Prep scope for aliasing demo. -Do Quiz #5. -Pass back midterms.

2
Analog Quantities Most physical quantities (temperature, pressure, light intensity, etc.) are analog quantities. Transducers are devices that convert one of these physical quantities to an analog voltage or current. Example, a temperature sensor might produce a voltage in mV that is proportional to the temperature in degrees Fahrenheit.

3
**Interfacing to the Analog World**

To use a computer to process analog information, we must first use an analog-to-digital converter (ADC) to transform the analog values into digital binary values. Conversely, we use a digital-to-analog converter (DAC) to transform digital values from the computer into analog values that can be used to control analog devices.

4
**A Typical Application . . Digital inputs Digital outputs Analog input**

(voltage or current) Analog output (voltage or current) ADC Computer DAC . . Control physical variable Physical variable Students who have taken EET 159: don’t confuse DAC with DAQ. But the DAQ cards in room 1230 contain DACs and ADCs. Transducer Actuator

5
**ADC: A Three-Step Process**

On the previous slide, the box labeled ADC actually represents three steps: Anti-aliasing Filter Sample and Hold Analog-to-Digital Conversion (Quantization) The circuits that perform these steps may be on separate chips or may be combined onto a single ADC chip. We’ll focus primarily on the third step, after a quick look at the first two.

6
Sampling Rate Most input signals to an electronic system start out as analog signals. One step in converting the input to a digital signal is sampling the input repeatedly. If we want to get an accurate representation of the original signal, we must sample at a high enough rate that we capture the signal’s variations. Show what the effect would be of sampling at a much lower rate in this picture.

7
**The Nyquist Sampling Theorem**

The Nyquist Sampling Theorem states that: In order to recover a signal, the sampling rate must be greater than twice the highest frequency in the signal. Stated as an equation, fsample > 2fa(max) where fsample = sampling frequency A thorough discussion of this topic would require far more space than Floyd devotes to it. fa(max) = highest harmonic in the analog signal If the signal is sampled less frequently than this, the recovery process will produce frequencies that are entirely different than in the original signal. These “masquerading” signals are called aliases.

8
**Aliasing on the Digital Oscilloscope**

To see an example of aliasing, use the oscilloscope to display a 10 kHz sine wave. For this frequency, what is a reasonable value for the SEC/DIV setting? Try setting the SEC/DIV to a much higher value, and you’ll see an alias of the original sine wave. Se discussion on page 20 of oscilloscope’s manual.

9
**Anti-Aliasing Filters**

The job of an anti-aliasing filter is to remove frequencies from the input signal that are higher than our sampling circuit can handle. This prevents the system from being fooled into thinking that the input signal contains frequencies that it doesn’t really contain. We won’t have to worry about this in tonight’s lab, but in real-life data acquisition this is a serious concern.

10
Anti-aliasing Filter An example of a reasonable sampling rate is in a digital audio CD. For audio CDs, sampling is done at 44.1 kHz because audio frequencies above 20 kHz are not detectable by the ear. Question What cutoff frequency should an anti-aliasing filter have for a digital audio CD? Answer Less than kHz.

11
Sample and Hold After the anti-aliasing filter, the next step in converting a signal to digital form is the sample-and-hold circuit. This circuit samples the input signal at a rate determined by a clock signal and holds the level on a capacitor until the next clock pulse. 10 V A positive half-wave from 0-10 V is shown in blue. The sample-and-hold circuit produces the staircase representation shown in red. 0 V

12
**Figure 12.5 Illustration of a sample-and-hold operation.**

Note: I’ve modified this figure by making the first sample much closer to 0 than is shown in the original figure. -At this point we haven’t yet converted the analog signal to digital, but we’ve prepared the signal to be converted. Note: I’ve modified this figure by making the first sample much closer to 0 than is shown in the original figure.

13
**Analog-to-Digital Conversion (Quantization)**

The final step is to quantize these staircase levels to binary coded form using an analog-to-digital converter (ADC). The digital values can then be processed by a computer.

14
**Number of Bits and Accuracy**

During the quantization process, the ADC converts each sampled value of the analog signal into a binary code. The more bits that are used in this code, the more accurate is the representation of the original signal. The following slides show an example of how using 2 bits (Figures 12.7 and 12.8) results in much less accuracy than using 4 bits (Figures 12.9 and 12.10).

15
**Figure 12. 7 Light gray = original waveform**

Figure Light gray = original waveform. Blue = Sample-and-hold output waveform. Pink = Four quantization levels if we use 2 bits to quantize. Next figure shows the result of this 2-bit quantization. Pass out copies. Have them fill in the 2-bit quantization for each sample, and then reconstruct the waveform from the digital data.

16
**Figure 12. 8 Light gray = original waveform**

Figure Light gray = original waveform. Blue = Reconstructed waveform using four quantization levels (2 bits).

17
**Figure 12. 9 Light gray = original waveform**

Figure Light gray = original waveform. Blue = Sample-and-hold output waveform. Pink = Sixteen quantization levels if we use 4 bits to quantize. Next figure shows the result of this 4-bit quantization. Pass out copies. Have them fill in the 2-bit quantization for each sample, and then reconstruct the waveform from the digital data.

18
**Figure 12. 10 Light gray = original waveform**

Figure Light gray = original waveform. Blue = Reconstructed waveform using sixteen quantization levels (4 bits).

19
**Resolution Several common ways of specifying an ADC’s resolution:**

Number of bits, n Number of output codes, = 2n, or number of steps in the output, = 2n − 1 Percentage resolution, = 1 / (2n − 1), expressed as a percentage Step size, = Vref / 2n

20
**Resolution: Examples n 4 2n 16 2n−1 15 1 / (2n−1) 6.67% Vref / 2n**

Formula 4-bit ADC 10-bit ADC Number of bits n 4 Number of output codes 2n 16 Number of steps in the output 2n−1 15 Percentage resolution 1 / (2n−1) 6.67% Step size (assuming 5 V reference voltage) Vref / 2n 312.5 mV

21
**How to Build an ADC There are several standard designs:**

Digital-Ramp ADC Successive Approximation ADC* Flash ADC* Dual-Slope ADC* Sigma-Delta ADC* Up/Down Digital-Ramp ADC Voltage-to-Frequency ADC *Discussed in the textbook Introduce first three methods with different strategies for playing a game to guess a number between 0 and 64.

22
**Operational Amplifiers**

Many ADCs and DACs contain one or more operational amplifiers (op amps). Op amps are extremely versatile devices that you’ll study in EET 207. We just need to know a little bit about op amps….

23
Op Amp with No Feedback Op amps are often used as comparators, in which case there is no feedback between the op amp’s output and either input: Vout is HIGH when Vin2 > Vin1. Vout is LOW when Vin2 < Vin1.

24
**Question Answer Flash ADC The flash ADC:**

The flash ADC uses a series of high-speed comparators that compare the input with reference voltages. Flash ADCs are fast but require 2n – 1 comparators to convert an analog input to an n-bit binary number. For example (choosing values that make the math easy), suppose Vref = 8 V. Then the voltages at the comparator inputs are 7 V, 6 V, 5 V, … Question How many comparators are needed by a 10-bit flash ADC? Answer 1023

25
**Successive Approximation ADC**

The successive approximation ADC: 1. Starting with the MSB, each bit in the successive approximation register (SAR) is activated and tested by the digital-to-analog converter (DAC). Vout DAC 2. After each test, the DAC produces an output voltage that represents the bit. D0 D1 Parallel binary output 3. The comparator compares this voltage with the input signal. If the input is larger, the bit is retained; otherwise it is reset (0). Comparator D2 Input signal D3 (MSB) (LSB) Serialbinary output SAR CLK The method is fast and has a fixed conversion time for all inputs.

26
ADC0804 Chip An integrated circuit successive approximation ADC is the ADC804. This popular ADC is an 8-bit converter that completes a conversion in 64 clock periods (100 ms). The completion is signaled by the INTR line going LOW. The pin naming is a little unusual. On many ADCs, ~WR would be called ~SOC (start-of-conversion) and ~INTR would be called ~EOC (end-of-conversion).

27
**A Popular ADC Chip ADC0804 (Datasheet on course website)**

Note separate analog and digital grounds, series RC network to control timing, and “handshaking lines” that a microprocessor uses to communicate with the ADC.

Similar presentations

OK

Analog-Digital Conversion. Analog outputs from sensors and analog front- ends (analog signal conditioning) have to be converted into digital signals.

Analog-Digital Conversion. Analog outputs from sensors and analog front- ends (analog signal conditioning) have to be converted into digital signals.

© 2017 SlidePlayer.com Inc.

All rights reserved.

Ads by Google

Ppt on different types of flowers Ppt on appendicitis and nursing care Ppt on producers consumers and decomposers song Ppt on chapter natural resources Ppt on content addressable memory Ppt on game theory youtube Ppt on amplitude modulation and demodulation Ppt on power grid failure 1965 Ppt on schottky diodes Ppt on various dance forms of india