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Lecture 17: Analog to Digital Converters Lecturers: Professor John Devlin Mr Robert Ross.

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1 Lecture 17: Analog to Digital Converters Lecturers: Professor John Devlin Mr Robert Ross

2 Overview Introduction to ADCs Types of ADCs Further Reading: –R.J. Tocci, Digital Systems, Principles and Applications, Prentice Hall (Chapter 10)

3 Introduction ADC’s The real world is full of analog, continuous signals Microprocessors use digital electronics (encoded with discrete binary values) for processing Analog to Digital Converters (ADC or A/D) convert continuous analog signals to discrete digital numbers – allowing digital electronics to sample real world signals ADC’s are ‘Mixed Signal Devices’ as they combine analog circuits with DSP Reverse of the operation of the DAC (Digital to Analog Converter)

4 Important Terms Resolution: Smallest analog increment corresponding to a 1 LSB change in conversion Voltage Reference: the voltage against which the input is compared, taken as the full scale voltage Conversion Time: Time required for a complete measurement Number of Bits: Number of bits used to digitally encode the measured signal

5 Calculations Analog Input = K X Digital Output Resolution = A fs : Analog full scale voltage n: Number of bits Digital Output = Analog Input / K Number of voltage levels = 2 n Number of voltage steps = 2 n -1

6 Example A 10 bit ADC is used to sample over the range 0 to 5 Volts (V REF+ = 5V, V REF- =0V) What is the step size? –5/ ( )= 4.89mV/step How would 2.1V be encoded? –(2.1/4.89mV) = 429 (Binary: ) What voltage would correspond to 321 being returned by the ADC? –(321) x 4.89mV = 1.57V

7 Example A 8 bit ADC is used to sample over the range 0 to 2 Volts (V REF+ = 2V, V REF- =0V) What is the step size? –2/ ( )= 7.84mV/step How would 0.5V be encoded? –0.5/7.84mV = 64 (Binary: ) How would 0.75V be encoded? –0.75/7.84mV = 96 (Binary: ) How would 2V be encoded? –2/7.84mV = 255 (Binary: ) What voltage would a code of 5 belong to? –5 x 7.84mV = 39mV What voltage would a code of 190 belong to? –190 x 7.84mV = 1.49V

8 ADC Interface Signals Data: Digital I/O pins the ADC uses to supply data Start: Pulse high to start conversion EOC (End of Conversion): Typically active low – will pulse low when conversion is complete Clock: Clock used for conversion

9 Types of ADC’s Flash Ramp-Compare (Integrating) Successive Approximation Sigma-Delta

10 Flash ADC Flash ADC (AKA Direct or Parallel ADC) uses a linear ladder of comparators to compare many different voltage references at the same time Very fast -> High Bandwidth Requires many comparators – expensive (2n – 1) comparators for n-bit conversion Therefore typically low resolution

11 Ramp-Compare (Integrating) ADC A comparison voltage V AX is ramped up When the comparison voltage matches the sampled voltage (V A ) the comparator is triggered – the sampled voltage has been determined

12 Ramp-Compare (Integrating) ADC Two different implementations: –Timing of a charging capacitor –Driving a DAC with a counter

13 Ramp-Compare (Integrating) ADC Variable Conversion Time (depends when ramp signal matches actual signal) Best case = 1 cycle Worst case = 2 n cycles Average conversion time: 2 n /2 Cycles, where n is the number of bits Slower than Flash, but much less comparators – allows for higher accuracy

14 Successive Approximation ADC Successive Approximation ADC’s use a binary search to converge on the closest quantisation level Binary search uses a divide and conquer algorithm Binary search: –Select middle element –If too high select middle element of lower group –If too low select middle element of upper group –Repeat until 1 element remains

15 Successive Approximation ADC Slower than Flash, but far fewer comparators – allows for higher accuracy Constant conversion time: n cycles Each cycle allows the next MSB to be determined 4 Bit SAC Bit 3 = 1 Bit 2 = 0 Bit 1 = 1 Bit 0 = 0

16 Sigma-Delta ADC Analog input used to drive a Voltage controlled oscillator (VCO) Using a counter and a specified time period the frequency of the VCO can be determined Since the frequency of the VCO is known, the input driving the VCO can be calculated Negative feedback is used to generate the oscillator – which is in the form of a 1 bit serial bit stream

17 Sigma-Delta ADC Oversampling (more than the minimum sampling rate of 2*fmax) Taking the mean of a series of over sampled measurements increases the resolution One bit (density of ‘1’s and ‘0’s represents the analog voltage)

18 Summary Analog to Digital converters allow digital electronics to sample real world analog signals Depending on the resolution and bandwidth requirements different methods of performing ADC can be used


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