1. © 2003-2008 BYU 16 FSM Page 1 ECEn 224 Finite State Machines

2. © 2003-2008 BYU 16 FSM Page 2 ECEn 224 State Machine Concepts State, current state, next state, state registers IFL, OFL, Moore outputs, Mealy outputs Transition tables –With output don’t cares (X’s) –With input don’t cares (-’s) State graphs –And their correspondence to TT’s

3. © 2003-2008 BYU 16 FSM Page 3 ECEn 224 Counters as State Machines A counter is a finite state machine –Where the state encodings are significant Q0 Q2 Q3 Q1 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 7 Segment Decoder

4. © 2003-2008 BYU 16 FSM Page 4 ECEn 224 State Machines A state machine is a sequential circuit which progresses through a series of states in reponse to inputs –The output values are usually significant –The state encodings are usually not significant Unlike with counters

5. © 2003-2008 BYU 16 FSM Page 5 ECEn 224 State Encodings In this machine, the state encodings don’t matter The output values do… … Event1 Event2 Event1 Event2Event3 Output1 Output2 Output3 Notice the alternate notation for X’ and outputs

6. © 2003-2008 BYU 16 FSM Page 6 ECEn 224 A State Machine Controller for a Photocopier Finite State Machine Lamps Motors Display Buttons Timers Switches Inputs Outputs 1)FSM receives inputs from copier 2)FSM generates control outputs in response 3)States help it remember where it is in the copy process…

7. © 2003-2008 BYU 16 FSM Page 7 ECEn 224 A Sequence Detector FSM S2 S1S3 Xin’ Xin Xin’ Z S0 Because the encodings don’t matter, we will use symbolic state names What does this machine do?

8. © 2003-2008 BYU 16 FSM Page 8 ECEn 224 A Sequence Detector FSM S2 S1S3 Xin Xin’ Z S0 It is called a sequence detector. It has 1 input (Xin) and one output (Z) It detects the sequence 0..1..1 on the input. When detected, output Z is asserted. Xin’ Xin Xin’

9. © 2003-2008 BYU 16 FSM Page 9 ECEn 224 A Sequence Detector FSM S2 S1S3 Xin Xin’ Z S0 As long as Xin=1, we stay in state S0 1..1..1..1..1.. Xin’ Xin Xin’

10. © 2003-2008 BYU 16 FSM Page 10 ECEn 224 A Sequence Detector FSM S2 S1S3 Xin Xin’ Z S0 When Xin=0, we go to state S1 1..1..1..1..1..0.. Xin’ Xin Xin’

11. © 2003-2008 BYU 16 FSM Page 11 ECEn 224 A Sequence Detector FSM S2 S1S3 Xin Xin’ Z S0 As long as Xin=0, we stay in state S1 1..1..1..1..1..0..0..0..0.. Xin’ Xin Xin’

12. © 2003-2008 BYU 16 FSM Page 12 ECEn 224 A Sequence Detector FSM S2 S1S3 Xin Xin’ Z S0 When Xin=1, we go to state S2 1..1..1..1..1..0..0..0..0..1.. Xin’ Xin Xin’

13. © 2003-2008 BYU 16 FSM Page 13 ECEn 224 A Sequence Detector FSM S2 S1S3 Xin Xin’ Z S0 If Xin=1 again, we go to state S3 1..1..1..1..1..0..0..0..0..1..1 SUCCESS! Raise the Z output Xin’ Xin Xin’

14. © 2003-2008 BYU 16 FSM Page 14 ECEn 224 A Sequence Detector FSM S2 S1S3 Xin Xin’ Z S0 Once we enter state S3, we never leave… Xin’ Xin Xin’

15. © 2003-2008 BYU 16 FSM Page 15 ECEn 224 A Sequence Detector FSM S2 S1S3 Xin Xin’ Z S0 What if we don’t see the second Xin=1 ? 1..1..1..1..1..0..0..0..0..1..0.. Xin’ Xin Xin’

16. © 2003-2008 BYU 16 FSM Page 16 ECEn 224 Implementing the Sequence Detector FSM 1.Create symbolic Transition Table 2.Assign state encoding 3.Create conventional Transition Table 4.Do standard implementation steps Symbolic TTConventional TTState Assignment S0 = 00 S1 = 01 S2 = 10 S3 = 11

17. © 2003-2008 BYU 16 FSM Page 17 ECEn 224 Sequence Detector Implementation Q1 CLK Q0 CLK Q1 D Q Q0 N1 N0 Q1 Xin Q0 Xin’ Q1 Z N1 = Q1Q0 + XinQ1 + XinQ0 N0 = Xin’ + Q1 Z = Q1Q0

18. © 2003-2008 BYU 16 FSM Page 18 ECEn 224 A Problem With the Sequence Detector This FSM only detects first occurrence of 011 on input… Here is a timing diagram –actual screenshot from a simulation 1 1 1 1 1 1 000

19. © 2003-2008 BYU 16 FSM Page 19 ECEn 224 Improved Sequence Detector This starts over each time 011 is detected… S2 S1 Xin’ Xin Xin’ Z S0 S3 Xin’ Xin

20. © 2003-2008 BYU 16 FSM Page 20 ECEn 224 Improved Detector Timing Diagram 0001110110001 Z=1 any time state is S3 Looking at Xin, does it look like Z is a cycle late? How could we make Z output a cycle earlier?

21. © 2003-2008 BYU 16 FSM Page 21 ECEn 224 Mealy Version of Sequence Detector S2 S1 Xin’ Xin Xin / Y Xin Xin’ S0 S3 Xin’ Xin Output is asserted during the second ‘1’ of the 011 sequence…

22. © 2003-2008 BYU 16 FSM Page 22 ECEn 224 Mealy Version Timing Diagram 01110111 Y Note how Mealy output follows input during state S2 Output is a cycle earlier than in Moore machine – it appears in S2 rather than in S3

23. © 2003-2008 BYU 16 FSM Page 23 ECEn 224 Simplified Mealy Sequence Detector A characteristic of Mealy state machines is they often require fewer states than Moore state machines Here is simplified but basically equivalent FSM S2 S1 Xin Xin / Y Xin Xin’ S0 Xin’

24. © 2003-2008 BYU 16 FSM Page 24 ECEn 224 Example FSM’s Two Car Wash Controllers

25. © 2003-2008 BYU 16 FSM Page 25 ECEn 224 Basic Car Wash FSM Operation 1.Wait for a token to be inserted 2.Reset timer 3.Turn on water pump until timer expires 4.Start over This assumes existence of: –Token acceptance mechanism –Timer –Digitally-controlled water pump

26. © 2003-2008 BYU 16 FSM Page 26 ECEn 224 Basic Car Wash FSM SG S_SPRAY S_TOKEN TOKEN TOKEN’ CLRT S_IDLE TDONE’ TDONE Wait for token… Clear timer… Spray car while waiting for timer to expire… SPRAY

27. © 2003-2008 BYU 16 FSM Page 27 ECEn 224

28. © 2003-2008 BYU 16 FSM Page 28 ECEn 224 Basic Car Wash Implementation D Q Q1 CLK Q0 CLK N1 N0 Q0 Q1 TDONE’ TOKEN Q1’ Q0’ SPRAY CLRT This is what you get from a K-map solution

29. © 2003-2008 BYU 16 FSM Page 29 ECEn 224 Simplified State Graph S_SPRAY TOKEN TOKEN’ CLRT S_IDLE TDONE’ TDONE SPRAY Clear timer while waiting for a token and eliminate a state

30. © 2003-2008 BYU 16 FSM Page 30 ECEn 224 Simplified Car Wash Implementation State Encoding: S_IDLE = 0, S_SPRAY = 1 NS = CS’TOKEN + CSTDONE’ CLRT = CS’ SPRAY = CS CS NS TDONE’ SPRAY D Q CS CS’ TOKEN CLRT CLK

31. © 2003-2008 BYU 16 FSM Page 31 ECEn 224 A Fancy Car Wash Controller Two types of washes: –Regular wash (spray only) = 1 token –Deluxe wash (spray, soap, spray) = 2 tokens Customer: –Inserts 1 token and pushes START for Regular –Inserts 2 tokens for Deluxe

32. © 2003-2008 BYU 16 FSM Page 32 ECEn 224 S3 TOKEN’ CLRT1 S0 S1 TOKEN TOKEN’ START’ TOKEN START’ S2 T1DONE’ SPRAY, CLRT2 T1DONE T2DONE’ S4 T2DONE SOAP, CLRT1 SPRAY T1DONE’ T1DONE START Straightforward process to write transition table and reduce to gates Creativity in FSM design is designing the initial state graph…

33. © 2003-2008 BYU 16 FSM Page 33 ECEn 224 Enhancements to Fancy Controller

34. © 2003-2008 BYU 16 FSM Page 34 ECEn 224 S3 TOKEN’ CLRT1, ACCEPTCOIN S0 S1 TOKEN TOKEN’ START’ TOKEN START’ S2 T1DONE’ SPRAY, CLRT2 T1DONE T2DONE’ S4 T2DONE SOAP, CLRT1 SPRAY T1DONE’ T1DONE START There is no way to cause coinbox to refuse tokens. Coins inserted after wash commences are presumably kept by the machine. Let’s add an ACCEPTCOIN output to control when coinbox will accept tokens… ACCEPTCOIN

35. © 2003-2008 BYU 16 FSM Page 35 ECEn 224 S3 TOKEN’ CLRT1 S0 S1 TOKEN TOKEN’ START’ TOKEN START’ S2 T1DONE’ SPRAY, CLRT2 T1DONE T2DONE’ S4 T2DONE SOAP, CLRT1 SPRAY T1DONE’ T1DONE START If customer pushes START at precisely the same time as he inserts another TOKEN, the FSM will take the token, but deliver a Regular Wash. That is, START has precedence over TOKEN ACCEPTCOIN

36. © 2003-2008 BYU 16 FSM Page 36 ECEn 224 S3 TOKEN’ CLRT1 S0 S1 TOKEN TOKEN’ START’ TOKEN S2 T1DONE’ SPRAY, CLRT2 T1DONE T2DONE’ S4 T2DONE SOAP, CLRT1 SPRAY T1DONE’ T1DONE STARTTOKEN’ This changes the precedence so the machine won’t steal the second token, but will give a deluxe wash in this case. ACCEPTCOIN

37. © 2003-2008 BYU 16 FSM Page 37 ECEn 224 Completeness and Conflict Revisited State S1 is a typical problem spot Carefully analyze the state graph to ensure no conflicts exist and that all cases covered.

38. © 2003-2008 BYU 16 FSM Page 38 ECEn 224 Resetting State Machines Ability to reset the FSM is essential for most systems Always include a reset capability –Add CLR signal to state graph –Use flip flops with reset/set inputs –Either method will work

39. © 2003-2008 BYU 16 FSM Page 39 ECEn 224 Another Example An Electronic Key Lock

40. © 2003-2008 BYU 16 FSM Page 40 ECEn 224 1)There are 10 keypads 0-9 2)The unlock sequence is 7..8..9 3)When a pad is pushed, the signal for that number is asserted 4)When any of the keypads are pushed a PUSHED signal is asserted 5)If you push a number out of sequence, you get an error indicator and you get to start over 6)After three wrong tries, you must wait ½ hour before trying again 7)If you entered the correct sequence, the lock unlocks. 8)Once the lock has opened, nothing happens until it is manually locked again. Inputs:Keypads signals 0-9 Outputs:INC PUSHED signalCLRCNTR ECNT3 (error count = 3)CLRTIMER WAITDONEERROR LOCKEDUNLOCK Example: Electronic Key Lock

41. © 2003-2008 BYU 16 FSM Page 41 ECEn 224 ECNT3’ A F E CB D Start PUSHED7 PUSHED7’/ INC PUSHED9/ UNLOCK ERROR ECNT3/ CLRTIMER WAITDONE’ WAITDONE/ CLRCNTR PUSHED’ LOCKED’ LOCKED/ CLRCNTR PUSHED8 PUSHED8’/ INC PUSHED9’/ INC

42. © 2003-2008 BYU 16 FSM Page 42 ECEn 224 Let’s create the transition table… ECNT3’ A F E CB D Start PUSHED7 PUSHED7’/ INC PUSHED9/ UNLOCK ERROR ECNT3/ CLRTIMER WAITDONE’ WAITDONE/ CLRCNTR PUSHED’ LOCKED’ LOCKED/ CLRCNTR PUSHED8 PUSHED8’/ INC PUSHED9’/ INC

43. © 2003-2008 BYU 16 FSM Page 43 ECEn 224 Now let’s expand State A …

44. © 2003-2008 BYU 16 FSM Page 44 ECEn 224 This is going to get ugly fast… 7 inputs + 3 state bits = 1024 rows in TT Can you do a 10-variable K-map? There is a technique called One-Hot state machines we can use instead (future lecture)… We could also use behavioral Verilog