Presentation on theme: "1 Finite State Machines (FSMs) Today: First Hour: FSM Concept –Section 8.1 of Katz’s Textbook –In-class Activity #1 Second Hour: Design Example w/ FSM."— Presentation transcript:
1 Finite State Machines (FSMs) Today: First Hour: FSM Concept –Section 8.1 of Katz’s Textbook –In-class Activity #1 Second Hour: Design Example w/ FSM Section 8.2 of Katz’s Textbook –In-class Activity #2
2 Counters vs FSMs Counters: Simple sequential circuits State = Output No inputs Simple single-path sequencing through the states Generalizes to Finite State Machines: Outputs are Function of State (and Inputs) Next States are Functions of State and Inputs Used to implement circuits that control other circuits "Decision Making" or “control” logic A Precursor of Finite State Machines
3 Recap: Synchronous FSMs Described by State Diagrams, much the same way that combinational logic circuits are described by Boolean Algebra. Current State [output] New State [output] Current Input(s) Change of state happens only on the clocking event
4 Each circle corresponds to a state Recap: 3-bit Binary Up-Counter The label inside each circle describes the state Arrows represent state transitions No labels on arrows, since the counter has no inputs
5 Example: Odd Parity Checker Asserts output whenever input bit stream (seen so far) has odd # of 1's Even  Odd  Reset State Diagram State Diagram Symbolic State Transition Table Encoded State Transition Table Observe that the output in this case depends only upon the present state, and not upon the input.
6 Design with Flip-flops QQ+T QQ+T T F/F: Excitation Table D F/F inputs are identical to the next state outputs in the state transition table D F/F inputs are identical to the next state outputs in the state transition table QQ+D QQ+D D F/F: Excitation Table
7 Odd Parity Checker Operation Excitation/Output Functions D = PS Input; Output = PS D R Q Q Input Clock PS/Output \Reset D D FF Implementation T R Q Q Input Clock Output \Reset T FF Implementation Timing Behavior: Input Clock Output Input
8 When When are inputs sampled, next states computed, outputs asserted? State Time State Time: Time between clocking events Clocking event Clocking event causes state/outputs to transition, based on inputs set-up/hold time For set-up/hold time considerations: Inputs should be stable before clocking event propagation delay After propagation delay, Next State entered, Outputs are stable NOTE: Asynchronous signals take effect immediately Synchronous signals take effect at the next clocking event Synchronous signals take effect at the next clocking event E.g., 3-state enable: effective immediately sync. counter clear: effective at next clock event sync. counter clear: effective at next clock event Timing
9 Timing Example On rising edge: inputs sampled, outputs & next state computed After propagation delay: outputs and next state are stable Immediate Outputs affect datapath immediately could cause inputs from datapath to change Delayed Outputs take effect on next clock edge propagation delays must exceed hold times Positive Edge Triggered Synchronous System Outputs State Time Clock Inputs
10 Communicating State Machines Machines advance in lock step Initial inputs/outputs: X = 0, Y = 0 Machines advance in lock step Initial inputs/outputs: X = 0, Y = 0 One machine's output is another machine's input Could be used to model: bus protocols, handshaking, 2-way communications, etc. ,  outputs ,  outputs
11 Do Activity #1 Now
12 Basic Design Approach 1. Understand the statement of the Specification 2. Obtain an abstract specification of the FSM 3. Perform a state minimization 4. Perform state assignment 5. Choose FF types to implement FSM state register 6. Implement the FSM Six Step Process
13 Vending Machine Concept deliver package of gum after 15 cents is deposited single coin slot for dimes, nickels no change General Machine Concept
14 Vending Machine FSM - 1 Block Diagram INPUTS OUTPUTS Step 1. Understand the problem Draw a picture!
15 Vending Machine FSM - 2 Tabulate typical input sequences three nickels nickel, dime dime, nickel two dimes two nickels, dime Draw state diagram Inputs: N, D, reset Output: open Step 2. Map into more suitable abstract representation
16 Vending Machine FSM - 3 Step 3: State Minimization reuse states whenever possible reuse states whenever possible Symbolic State Table
17 Vending Machine FSM - 4 Step 4: State Encoding How many flip-flops are needed?
18 Vending Machine FSM - 5a Step 5. Choose F/Fs for implementation D F/F easiest to use
19 Vending Machine FSM - 5b Step 5. Choose FF for Implementation (continued) J X X X X X X X X X X J-K F/F Remapped encoded state transition table Next State Q0+Q X X X 1 X Present State Q 1 Q D N Inputs K 1 X X X X X X X X X X K 0 X X X X X X X X X X J X X X X X X X X X X Q1+Q1+
20 Vending Machine FSM - 6a D1 = Q1 + D + Q0 N D0 = N Q0 + Q0 N + Q1 N + Q1 D OPEN = Q1 Q0 8 Gates Step 6. Implementation: D F/Fs
21 Vending Machine FSM - 6b Step 6. Implementation: J-K F/Fs J1 = D + Q0 N K1 = 0 J0 = Q0 N + Q1 D K0 = Q1 N 7 Gates
22 Do Activity #2 Now Due: End of Class Today. RETAIN THE LAST PAGE(S) (#3 onwards)!! For Next Class: Bring Randy Katz Textbook, & TTL Data Book Required Reading: – Sec 8.4 of Katz This reading is necessary for getting points in the Studio Activity!