# Analysis of Clocked Sequential Circuits

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Analysis of Clocked Sequential Circuits

Example of a Sequential Circuit
D flip-flops

A(next)=0 B(next)=0 Y(next)=0

What are A(next), B(next) and y(next) given that A=1, B=1 and X=1?
D flip-flops

Alternate State Table

State Diagram Each circle is a state When x=1, y=0.

State Diagram Each circle is a state When x=0, y=1.

Detects 0 in the bit stream of data
Output is a 0 as long as input is a 1. The first 0 after a string of 1 transfers the circuit back to 00.

Summary

Model a Clocked Sequential Circuit with Verilog
Use parameter to define constants Form the next state from x and the current state Form the output fork.....join construction S0 S2 S1 S3

Parameter S0 S2 S1 S3 Define states with parameter

Update States S0 S2 S1 S3 If reset is 0, set state to S0.
If reset is 1, update state with next_state. S1 S3

Implement the States Using State Diagram

fork....join

Right click to add state and next_state to the waveform shown right

Valid Mealy Output S0 S2 S1 S3

Mealy Glitches Glitiches occur because x changes before
the next rising clock edge S0 S2 S1 S3

General Structure of a Mealy Machine
Output depends on input as well as the state The circuit is in. (variable: state) Synchronize the input with clock when using Mealy machine.

Moore Machine Output depends on the state, but not the input.

Synthesis of Sequential Circuit

State Diagram for Sequence Detector
Problem statement: Design a circuit that detects a sequence of three or more consecutive 1’s in a string of bits coming through an input line

State Diagram of the Word Description
Start with S0. if input is 0, stay in S0. if input is 1, go to S1. Once in S1 if input is 1, go to S2. if input is 0, go to S0. Once in S2 if input is 1, go to S3. Once in S3, if input is 1, stay in S3, set output to 1. Output is 1 when the circuit is in S3, 0 otherwise.

Assign Binary Value to the States
1 2 3 4 5 6 7 Use two flip-flops to represent states. Let x be the input And y be the output

Assign Binary Value to the States
1 2 3 4 5 6 7

Circuit Implementation

Sequence Detector Circuit
Random Number generator

Measurement Results B A x y clk