1. Amplitude and Phase Noise in Nano-scale RF Circuits
Reza Navid
May 14, 2007

2. CMOS Scaling Since Early 70s
4004 Intel Processor
2,250 10m-MOSFETs
386 Intel Processor
275,000 1m-MOSFETs
Pentium IV Intel Processor
169,000,000 90n-MOSFETs
Channel Length (Micron)
Number of MOSFETs
Today, 45nm technology node is available for commercial production design.
Several other nano-scale devices are also becoming available.

3. Scaling Problem at Nanometer Scales
Reliability:
Mismatch:
Physical length
Intrinsic Gain:
Small output resistance
Low intrinsic gain
Noise:
Short-channel MOSFETs
are noisier that Long-channel ones
Long-channel
prediction
1986
Year
1999
1994
1996
Drain Noise level Ro

4. Electrical noise strongly impacts the overall performance.
Noise in RF Receivers
LNA Noise
Phase Noise
Input Noise
Output Noise
Mixer
IF Filter
LNA
Transmission
Supper heterodyne receiver is a perfect example of the effect of noise in communication.
No Signal LO
Electrical noise strongly impacts the overall performance.

5. Outline Amplitude Noise in MOSFET
Noise in MOSFETs
Physical and Compact Models
Noise Performance of Ballistic MOSFETs
Jitter and Phase Noise in Oscillators
Indirect Noise Characterization Using Phase Noise
Time-Domain Formulation of Phase Noise
Experimental Results
Directions for Further Research
Conclusions

6. Outline Amplitude Noise in MOSFET
Noise in MOSFETs
Physical and Compact Models
Noise Performance of Ballistic MOSFETs
Jitter and Phase Noise in Oscillators
Indirect Noise Characterization Using Phase Noise
Time-Domain Formulation of Phase Noise
Experimental Results
Directions for Further Research
Conclusions

7. Noise Sources in MOSFETs
There are two noise sources in a MOSFET:
Drain current noise (ind)
Induced gate noise (ing)
Gate
Drain
Drain
ing gg
Cgs
gmvgs go
ind
Gate
Source
Source
1/f noise
There are two noise sources in a MOSFET working in saturation.
White noise
Gate Noise: Carrier fluctuations
coupled to gate through Cgs
1/f Noise: Unknown origin, believed to be due to traps
We study the white noise part of the drain noise in saturation.

8. Classical MOSFET Noise Formulation
Classical long-channel formulation
Impedance Field Method [Van Der Ziel, 1970]:
Divide the channel into small pieces
Calculate noise of each piece (assuming equilibrium noise)
Integrate (assuming independence) G S D
Noise transfer
function (Impedance) N+ N+ dR dx dR
The classical formulation of noise in MOSFETs is based on a method called impedance field method.
It accurately predicts noise in long-channel MOSFETs.

9. Deficiency of the Long-Channel Model
Excess noise has been reported for 20 years now: g
7.9
Abidi (0.7mm)
3.3
Triantis (0.7mm)
2.9
Jindal (0.75mm)
Tedja (1mm)
Scholten (0.35mm)
1.1
Long-channel
prediction
0.67
The problem with this simple formulation is that ….
1986
1994
1996
1999
Year
Several methods are proposed to study this excess noise.

10. Excess Noise in Short-Channel FETs
Researchers have tried to explain excess noise:
Local heating effects [Traintis, 1996]
Hydrodynamic simulations [Goo, 1999, Jungemann 2002]
Montecarlo analysis [Jungemann, 2002] …
Usual approach
Model revision
Our approach
Ballistic Mode:
Ind=2qId
Long-Channel Model:
Ind=4kTggdo
Short-Channel
Model: Ind=4kTgshgdo
Short-Channel
Model: Ind=ks(2qId)
Model revision
MOSFETs are moving towards ballistic limit.
Several methods are proposed to explain and predict the excess noise in MOSFETs.
Long-Channel FETs
Today’s FETs, 50% Ballistic
Ballistic FETs
We present a model based on ballistic MOSFET model.

11. Outline Amplitude Noise in MOSFET
Noise in MOSFETs
Physical and Compact Models
Noise Performance of Ballistic MOSFETs
Jitter and Phase Noise in Oscillators
Indirect Noise Characterization Using Phase Noise
Time-Domain Formulation of Phase Noise
Experimental Results
Directions for Further Research
Conclusions
Now we change gear a little bit and talk about phase noise of CMOS oscillators. We present a formulation of phase noise which has two applications.

12. Phase Noise in Oscillators
Device noise leads to frequency fluctuations.
Example: Ring Oscillators
Output t
Time Domain
To see how device noise can lead to phase noise, let’s look at the simple example of a ring oscillator. I
Phase Noise fo f t
Frequency Domain
Phase noise characterizes the frequency fluctuations.

13. Phase Noise: Formulation and Measurement
Phase noise definition:
PSD of signal divided by power
Hard to formulate
Easy to measure
PN (dBc/Hz) fo
fo+Df f
Phase noise measurement helps estimate device noise:
The most famous characteristic of phase noise is that it is easy to measure but hard to calculate.
Need accurate formulation for specific oscillators.
Time-domain phase noise analysis method
This method is most suitable for formulation of phase noise in switching-base oscillators.

14. Time-Domain Phase Noise Analysis
Formulation of phase noise:
1) Calculate jitter
2) Calculate phase noise using jitter-phase-noise relationships
Jitter characterization: T2 Ti T1
With white noise
(presented here)
i-j
With colored noise
(presented elsewhere)
Without low-frequency poles
In time domain analysis of phase noise we first calculate the jitter in time domain and then calculate the phase noise using exact equation with little or no approximations. Animation here is what we usually face.
DTiDTj has necessary and sufficient information for phase noise calculation.

15. Jitter in Switching-Based Oscillators (1)
Energy-injecting elements act like ideal switches. in in vC
vout
vref
vout
The method is specially accurate for switching based oscillators. vC
Passive noisy network
Ideal noise-free switch in C R
Calculate jitter during each switching; Add them up to find total jitter.

16. Jitter in Switching-Based Oscillators (2)
Calculation procedure:
Calculate voltage variance at the switching time.
Divide by the square of voltage slope to get jitter. vc
2Dvc
Slope=S
vref
vref vC in C R
2Dvc
2DT t
Once we model an oscillator like a switching based oscillator the rest of the calculations are straightforward.
This is suitable for switching-based oscillators.

17. Jitter-Phase-Noise Relationships (1)
If all covariance terms are zero [Navid, 2005],
Variance of one period
We then need an equation to give phase noise for a given phase noise.
PN (dBc/Hz)
Df (Hz)
Df (Hz)
The 1st harmonic
The 3rd harmonic
Phase noise has peaks around odd harmonics, as expected.

18. Jitter-Phase-Noise Relationships (2)
It can be approximated by a Lorentzian Function.
Consistent with the results for sinusoidal signals [Herzel, 1999]
Exact
phase noise
Usually:
PN(dBc/Hz)
The equation can be approximated by this …
Lorentzian
Df (Hz)
Jitter-phase-noise relationship for nonzero jitter covariance is presented elsewhere [Navid, 2004].

19. Phase Noise in Ring Oscillators
Time-domain phase noise analysis:
Treat invertors as ideal switches.
Use long-channel noise formulation. A B A B
On State:
We apply this method to a simple relation oscillator.
Off State:
Use time-domain jitter analysis for switching-based oscillators.

20. Phase Noise in Ring Oscillators (cont.)
Using jitter-phase-noise relationships [Navid, 2005]:
After some simplification and using jitter-phase-noise relationships we get …
Dynamic Power
Very simple equations, but how accurate?

21. Phase Noise in Ring Oscillators
Measured results form Hajimiri, JSSC 1999 compared to our formulation:
DPN (dB)
This table compares our prediction to measured results.
Lmin (mm)
Df=1MHz
The difference is only a few dB; it increases in short-channel devices.

22. Oscillators for Noise Characterization
Need an oscillator with predictable phase noise, not necessarily low phase noise: an unsymmetrical ring oscillator.
This table compares our prediction to measured results.
The unsymmetrical ring oscillator is only one of many possibilities.

23. The Unsymmetrical Ring Oscillator
Chip photo:
Ring oscillators for functionality test
MIM Capacitors
OSC1, L=.18mm
OSC2, L=.38mm
OSC3, L=.54mm
This table compares our prediction to measured results.
Fabricated in National Semiconductor’s 0.18mm CMOS process.

24. MOSFET Noise Characterization
Frequency spectrum of the oscillators:
This table compares our prediction to measured results.
The oscillator with longer transistors has better spectral purity.

25. MOSFET Noise Characterization (Cont.)
Phase noise of the oscillators:
This table compares our prediction to measured results.
Oscillator with Longer transistors has 7dB smaller phase noise.

26. Device Noise Parameters
Device noise parameters can be extracted from phase noise data.
Full shot noise
Long-channel prediction
OSC3
OSC1
This table compares our prediction to measured results.
Extracted device noise parameters are consistent with our prediction.

27. Further Research on Phase Noise
Indirect device noise characterization for Nanotubes and Nanowires:
Ring oscillators built with these devices are already available (Z. Chen et al, Science 24 March 2006).
Time-domain phase noise analysis:
Jitter/phase noise calculation for various oscillators/PLL systems.
VCO
Fref
Charge
Pump
Loop
Filter
PFD :N Vb

28. Noise for Device Engineering
Non-equilibrium noise carries unique device information
Device engineering based on noise characterization
Examples:
Examine carrier transport using noise data
Nano-tubes, Nano-wires, MOSFETs, …
Design new devices based on noise measurement
Bio-analytical devices
Use noise data to improve existing devices and build new ones.

29. Other Scaling Problems
Reliability:
Mismatch:
Physical length
Intrinsic Gain:
Small output resistance
Low intrinsic gain
Noise:
Short-channel MOSFET
are noisier that Long-channel ones
Long-channel
prediction
1986
Year
1999
1994
1996
Drain Noise level Ro

30. Conclusions
Efficient CMOS analog design calls for a careful study of noise in MOSFETs, which has been a mystery for two decades.
Time domain phase noise analysis method accurately predicts the phase noise in switching-based oscillators.
Device noise can be characterized through phase noise measurement, facilitating process characterization.
Noise can be useful.

31. Acknowledgment
This work is supported under an SRC customized research project from Texas Instruments and MARCO MSD center.
We would like to thank National Semiconductor Inc. for the fabrication of test chips.