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1 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 2011 ERD chapters, scope, difficult challenges, taxonomy, etc. An Chen GLOBALFOUNDRIES.

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Presentation on theme: "1 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 2011 ERD chapters, scope, difficult challenges, taxonomy, etc. An Chen GLOBALFOUNDRIES."— Presentation transcript:

1 1 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 2011 ERD chapters, scope, difficult challenges, taxonomy, etc. An Chen GLOBALFOUNDRIES

2 2 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Scope The addition of “More-than-Moore” broadens the ERD chapter coverage and leads to new directions. The scope of ERD goes beyond “digital” into diversified functional domains. New criteria and methodologies may be needed, e.g., benchmarking. Differentiation of “More Moore”, “More-than-Moore”, and “beyond CMOS”. (next page) The addition of “storage class memory”, and “select device/diode” in memory section address key issues in application and critical technology enablers. The addition of quantitative benchmarking (based on NRI work) in critical assessment complement the survey-based assessment. Need to ensure consistency. Technology highlights expanded: carbon nanoelectronics, STT- MRAM and ReRAM. Provide guidance in down-selection.

3 3 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Fig. ERD1 “Source: ERD-WG in Japan”? An interesting visualization of concepts of “More Moore”, “More-than-Moore”, and “beyond CMOS”, but clarification may be needed. More Moore: “The expansion of the CMOS platform by conventional dimensional and functional scaling” More-than-Moore: “added value to devices is provided by incorporating functionalities that do not necessarily scale according to Moore's Law” Beyond CMOS: “new information processing devices and architectures.... have been the main subjects of this chapter”

4 4 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Difficult challenges (1) Difficult challenges labeled with time frame (2018-2026) instead of technology nodes. “Develop 2 nd generation new channel materials” for CMOS scaling: intend to incorporate novel material including graphene?

5 5 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Difficult challenges (2) Add the issue of compatibility requirement of “new information processing technology” with “system architecture” (row 5): highlight the importance of architectures in utilizing unique characteristics. Add an entry of “More-than-Moore” (row 6): highlight the trend of functional diversification and future directions beyond “Moore’s law”.

6 6 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Taxonomy Is it good to move these boxes not included in “conventional scaled CMOS” to the right to be grouped with other similar boxes, and move the layer name to the left to provide necessary space? Right now they are mixed with red-lined yellow boxes representing the current CMOS platform technology. The taxonomy for nano information processing technologies is the same as in 2009: a good visualization of layers of processing technology components and options. Is it necessary to rename some entries?

7 7 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Two assessments – consistency

8 8 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Technology entries – memory Memory entries: –Ferroelectric FET –Ferroelectric polarization ReRAM –Nanoelectromechanical memory –Redox memory –Mott memory –Macromolecular memory –Molecular memory Changes: (1) STTRAM move out; (2) Ferroelectric polarization ReRAM added to ferroelectric memory; (3) nanothermal and nanoionic memories merged in Redox memory; (4) electronic effect memory move out; (5) Mott memory added. The “research activity” entry is useful to evaluate progress. Need to ensure consistent and comprehensive measures used in selecting papers. Potential new entries? –Example: magneto-electric (ME) cell –…

9 9 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Technology entries – logic Logic entries:

10 10 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Organization, consistency, clarity Chapter 4 includes memory, logic, and MtM (page 5-27) and is very heavy. An associated problem is the long section labels (e.g., “4.1.3.2.2.1 MIT switch”). Should it be divided into three separated chapters? Typos on page 13: following “4.1.4.4” is “4.1.1.5” and should be “4.1.4.1”; section “4.2” starts with “4.2.4” and should be “4.2.1”. Long section labels may cause confusion. Choice of figures: there is one Fig. in the whole chapter 4, Fig. ERD3 on excitonic FET. Why not figures for other devices? Should we add a figure list and a table list in the text? With new additions, there is significant increase of references: from 327 (2009) to 577 (2011). What can be done to increase the voting number for critical assessment? –Votes outside of ERD group? –More frequent survey (e.g., workshop, conference)? “Lookout table” for speculative devices or devices with limited experimental proof?

11 11 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Entries with different maturity

12 12 ERD 2011 ITRS Winter Conference – Incheon, Korea – 11 December 2011 Overall Good expansion from 2009 version –More-than-Moore –Storage class memory, select device/diode –Quantitative assessment –Significant addition of references –Highlights Ensure clarity and consistency –Chapter organization –Technology entries –Critical assessments


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