1. Decoder Mano Section 4.9

2. Outline Decoder Applications Verilog

3. Example of a Decoder Convert binary information from n input lines to 2 n unique output lines. This particular circuit take a binary number and convert it to an octal number.

4. Hardware Implementation

5. AND and NOR Decoders Take an n-bit address. Produce 2 n outputs, One of which is activated. (NOR Decoder)

6. Organization of Memory Systems

7. Basic SRAM and VTC A wordline is used to select the cell Bitlines are used to perform read and write operations on the cell

8. Cross Coupled Configuration The cell can only flip its internal state when one of its internal cross V S. During a read op, we must not disturb its current state. During a write op, we must force the internal voltage to swing past V S to change a state.

9. A 2-to-4 decoder with Enable (typo, should be a 0)

10. Demultiplexer A Demux is a circuit that receives information from a single line and directs it to one of 2 n possible output lines.

11. Use a 2-to-4 decoder as a Demux (typo, should be a 0) Treat A and B as the selector bits. i.e. A and B select which bit should receive infomraiton. E is treated as the data line.

12. Implement a Full Adder with a Decoder

13. Build a Bigger Decoders Use w to enable either top or bottom decoder.

14. 3-to-8 decoder in verilog

15. 3-to-8 decode Input bits

16. Use a Test Bench to Generate output Initial statements execute once starting from time 0. $monitor: display variable whenever a value changes. $time display the simulation time

17. Run functional Simulation

18. Results