1. Topics Combinational logic functions.
Static complementary logic gate structures.
Switch logic.
Non-standard gate structures.

2. Combinational logic expressions
Combinational logic: function value is a combination of function arguments.
A logic gate implements a particular logic function.
Both specification (logic equations) and implementation (logic gate networks) are written in Boolean logic.

3. Gate design Why designing gates for logic functions is non-trivial:
may not have logic gates in the libray for all logic expressions;
a logic expression may map into gates that consume a lot of area, delay, or power.

4. Boolean algebra terminology
Function:
f = a’b + ab’
a is a variable; a and a’ are literals.
ab’ is a term.
A function is irredundant if no literal can be removed without changing its truth value.

5. Completeness
A set of functions f1, f2, ... is complete iff every Boolean function can be generated by a combination of the functions.
NAND is a complete set; NOR is a complete set; {AND, OR} is not complete.
Transmission gates are not complete.
If your set of logic gates is not complete, you can’t design arbitrary logic.

6. Static complementary gates
Complementary: have complementary pullup (p-type) and pulldown (n-type) networks.
Static: do not rely on stored charge.
Simple, effective, reliable; hence ubiquitous.

7. Static complementary gate structure
Pullup and pulldown networks:
VDD
pullup
network
out
inputs
pulldown
network
VSS

8. Inverter +
out a

9. NAND gate +
out b a

10. NOR gate + b a
out

11. AOI/OAI gates AOI = and/or/invert; OAI = or/and/invert.
Implement larger functions.
Pullup and pulldown networks are compact: smaller area, higher speed than NAND/NOR network equivalents.
AOI312: and 3 inputs, and 1 input (dummy), and 2 inputs; or together these terms; then invert.

12. AOI/OAI gates

13. Construction of an AOI Gate
out = [ab+c]’:
invert
symbol
circuit or
and

14. Construction of another AOI Gate

15. Pullup/pulldown network design
Pullup and pulldown networks are duals.
To design one gate, first design one network, then compute dual to get other network.
Example: design network which pulls down when output should be 0, then find dual to get pullup network.

16. Dual Network Construction

17. Switch logic Can implement Boolean formulas as networks of switches.
Can build switches from MOS transistors—transmission gates.
Transmission gates do not amplify but have smaller layouts.

18. Switch logic network a b
out X 1 a b 1

19. Another switch logic networkb
out X 1 r s a r b s

20. Switch-based mux

21. Types of switches

22. Behavior of n-type switch
n-type switch has source-drain voltage drop when conducting:
conducts logic 0 perfectly;
introduces threshold drop into logic 1.
VDD
VDD - Vt
VDD

23. n-type switch driving static logic
Switch underdrives static gate, but gate restores logic levels.
VDD
VDD - Vt
VDD

24. n-type switch driving switch logic
Voltage drop causes next stage to be turned on weakly.
VDD
VDD - Vt
VDD

25. Behavior of complementary switch
Complementary switch products full-supply voltages for both logic 0 and logic 1:
n-type transistor conducts logic 0;
p-type transistor conducts logic 1.

26. Charge Sharing Problem
Values are stored at parasitic capacitances on wires:

27. Charge Sharing Problem

28. Charge Sharing Example1 1 1 1

29. Application of Transmission Gate

30. Application of Transmission Gate