1. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG1 Spectral Characterization of Functional Vectors for Gate-level Fault Coverage Tests Nitin Yogi and Vishwani D. Agrawal Auburn University Department of ECE, Auburn, AL 36849, USA yoginit@auburn.eduyoginit@auburn.edu, vagrawal@eng.auburn.eduvagrawal@eng.auburn.edu

2. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG2 Outline Verification and Testing Problem and Approach Spectral analysis and generation of test sequences Test sequence compaction Experimental Results Conclusion References

3. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG3 Verification and Testing Verification vectors –are mandatory and required; to check for functional correctness of a digital system –are generated based on the behavior of the system –have been found useful in detection of manufacture defects like timing faults –have low stuck-at fault coverage (poor defect level), but no yield loss Manufacturing tests –may be non-functional; cannot be used for verification –have high test generation complexity –have high stuck-at fault coverage

4. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG4 Problem and Approach The problem: –To develop manufacturing tests from verification vectors. Our approach: –Implementation-independent characterization: Functional vectors obtained either from design verification phase or by exercising various functions of the circuit. Characterization of verification vectors for spectral components and the noise level for each PI of the circuit. –Test generation for gate-level implementation: Generation of spectral vectors Fault simulation and vector compaction

5. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG5 Verification vectors A B F C G D E 1 / 0 0 / 0 1 / 0 X / 0 0 / 0 X / 1 X / 0 State Diagram (b02 ckt.) 4 bit multiplier AB 4 bits 8 bits Behavioral Description (s344 ckt.) Cases to verify: Y AB Non-zero 0 0 00 Max no. Other cases … Cases to verify : all state transitions Input / output

6. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG6 Walsh Functions and Hadamard Spectrum 1 1 1 1 1 -1 1 -1 1 1 -1 -1 1 -1 -1 1 1 1 1 1 -1 -1 -1 -1 1 -1 1 -1 -1 1 -1 1 1 1 -1 -1 -1 -1 1 1 1 -1 -1 1 -1 1 1 -1 H 8 = w0w0 w1w1 w2w2 w3w3 w4w4 w5w5 w6w6 w7w7 Walsh functions (order 8) Walsh functions form an orthogonal and complete set of basis functions that can represent any arbitrary bit-stream. Walsh functions are the rows of the Hadamard matrix. Example of Hadamard matrix of order 8:

7. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG7 Characterizing a Bit-Stream A bit-stream is correlated with each row of Hadamard matrix. Highly correlated basis Walsh functions are retained as essential components and others are regarded as noise. Bit stream to analyze Correlating with Walsh functions by multiplying with Hadamard matrix. Essential component (others noise) Hadamard Matrix Bit stream Spectral coeffs.

8. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG8 Test Vector Generation Spectrum for new bit-streams consists of the essential components and added random noise. Essential component plus noise spectra are converted into bit- streams by multiplying with Hadamard matrix. Any number of bit-streams can be generated; all contain the same essential components but differ in their noise spectrum. Perturbation Generation of test vectors by multiplying with Hadamard matrix Spectral components Essential component retained New test vector

9. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG9 Spectral Testing Approach (Circuit Characterization) Verification vector generation: –Verification vectors are generated to exercise various functions of the circuit including its corner cases. Spectral analysis: –Verification sequences for each input are analyzed using Hadamard matrix. –Essential components are determined by comparing their power H i 2 with the average power per component M 2. –Condition to pick-out essential components: where K is a constant –The process starts with the highest magnitude component and is repeated till the criteria is not satisfied.

10. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG10 Circuit s298: Coefficient Analysis Examples of essential components Examples of noise components

11. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG11 Functional Verification Vectors for Spectral ATPG Start with functional verification vectors. Characterize verification vectors for Walsh spectrum and noise level. Generate new sequences by adding random noise to the Walsh spectrum. Use fault simulator (Flextest) and integer linear program (ILP) to compact sequences.

12. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG12 Selecting Minimal Vector Sequences Using ILP A set of perturbation vector sequences {V 1, V 2,.., V M } is generated, fault simulated and faults detected by each is obtained. Compaction problem: Find minimum set of vector sequences that cover all detected faults. Minimize Count {V 1, …,V M } to obtain compressed seq. {V 1,…,V C } where {V 1, …,V C } {V 1, …, V M } Count {V 1, …,V C } ≤ Count {V 1, …,V M } Fault Coverage {V 1, …,V C } = Fault Coverage {V 1, …,V M } Compaction problem is formulated as an Integer Linear Program (ILP) [1]. [1] P. Drineas and Y. Makris, “Independent Test Sequence Compaction through Integer Programming," Proc. ICCD’03, pp. 380-386.

13. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG13 ILP formulation Each vector sequence in {V 1, V 2,.., V M } is fault simulated with the circuit in unknown state Faults detected by each sequence is obtained Variable x i defined for each vector seq. V i such that x i = 0 : vec. seq. V i not selected = 1 : vec. seq. V i selected Constraint equation formulated for each detected fault f k. For example, if fault f 3 is detected by vec. sequences V 3, V 4 and V 11, then the constraint equation is x 3 + x 4 + x 11 ≥ 1 Solve for objective function: Minimize

14. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG14 Experimental Circuits Spectral ATPG technique applied to the following benchmarks: –three ISCAS’89 circuits. –one ITC’99 high level RTL circuit –Parwan microprocessor Characteristics of benchmark circuits: Fault simulation performed using commercial sequential ATPG tool Mentor Graphics FlexTest. Results obtained on Sun Ultra 5 machines with 256MB RAM. CircuitBenchmarkPIsPOsFFsFunction s298ISCAS’893614Traffic light controller s344ISCAS’89911154 x 4 add-shift multiplier s349ISCAS’89911154 x 4 add-shift multiplier b02ITC’99214Finite-state machine

15. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG15 ATPG Results Circuit No. of gate faults Functional Vectors Spectral ATPGGate-level ATPG No. of vecs. Fault Cov. (%) No. of vecs. Fault Cov. (%) CPU (s) No. of vecs. Fault Cov. (%) CPU (s) s2986987581.2319284.742115285.8945 s34410205787.4525691.085115090.7823 s34910305787.0925690.685115090.3926 b021481385.4712893.92103894.261

16. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG16 Functional Spectral ATPG: s298 Spectral ATPG Gate-level ATPG Functional vectors Random vectors

17. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG17 Functional Spectral ATPG: ITC’99 Benchmark b02 (FSM)

18. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG18 Parwan Microprocessor Reference: Z. Navabi, Analysis and Modeling of Digital Systems, NY: McGraw-Hill, 1993.

19. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG19 Parwan: Spectral ATPG

20. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG20 Conclusion Spectral ATPG technique for verification vectors is applied to three ISCAS’89 and one ITC’99 benchmark circuits. Coverage of functional vectors can be effectively improved to match that of a gate-level ATPG by the proposed method. Test generation using Spectral ATPG brings with it all the benefits of high level testing Techniques that will enhance Spectral ATPG are: –Accurate determination and use of noise components –Better compaction algorithms

21. Aug 11, 2006Yogi/Agrawal: Spectral Functional ATPG21 References N. Yogi and V. D. Agrawal, “High-Level Test Generation for Gate-Level Fault Coverage,” Proc. 15 th IEEE North Atlantic Test Workshop, May 2006, pp. 65-74. N. Yogi and V. D. Agrawal, “Spectral RTL Test Generation for Gate-Level Stuck-at Faults,” Proc. 19 th IEEE Asian Test Symp., November 2006. N. Yogi and V. D. Agrawal, “Spectral RTL Test Generation for Microprocessors,” submitted.