1. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Course Tutor Dr R E Hurley Northern Ireland Semiconductor Research Centre School of Electrical & Electronic Engineering The Queen’s University of Belfast

2. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland 2. The future of silicon Life left in silicon? New materials

3. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Silicon advantages Silicon is strong and cheap. (III-V and Ge expensive). Si bonds cleanly to oxide. (Passivation (H) techniques exist for dangling bonds (free electrons). Can make large ultra-flat wafers. Silicon can still be used with new dielectrics (HfO2) and gate materials.

4. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Advantages of silicon oxide Grown by simple exposure to oxygen gas or water vapor at elevated temperatures, (until recently remained the gate insulator of choice). Success based on the wonderful properties of the silicon/silicon dioxide interface. (This interface has only about 10 12 cm −2 electrically active defects). After a simple passivating hydrogen exposure, 10 10 cm −2 defects remain— only one defect for every 100,000 interface atoms!

5. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Scaling of the SiO2 gate oxide over tech. generations ½ pitch DRAM

6. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland 45 nm is the point where problems arise and this is being reached now. SiO2 has become too thin to prevent leakage (→ heat dissipation problems, breakdown) At 10Å tunnelling current densities reach > 100 A/cm 2 !

7. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland TEM of 12Å SiO2 gate oxide at the 90nm logic technology High resolution TEM by INTEL

8. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland High resolution TEM by INTEL TEM of SiO2 at 8Å gate width

9. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland 15 nm Si transistors with 0.8 nm SiO 2 gates Experimental NMOS Inversion split CV measurements

10. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Leakage measurements at 8Å gate width Inversion gate leakage current density v. volts, Vg

11. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland SiO2 creates big heat dissipation problems. SiO2 has run out of atoms! Find a new dielectric with high k When SiO2 gets very thin

12. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Direct tunnelling causes leakage For the same capacitance, C = ε 0 κA/t t can be increased for higher κ This eliminates tunnelling To compare with silicon, the equivalent oxide thickness (EOT) is defined as: EOT = (3.9/κ)t (highk) Scaling with high k dielectric

13. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Gate leakage for high-k dielectric compared to SiO 2 Accumulation gate leakage for high- k/metal gates and SiO2/ polySi gates

14. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Some possible high-k materials

15. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland High-k candidates summary

16. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland MOCVD system for HfO2 Vapours introduced react with heat on surface

17. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland

18. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Deposition by Atomic Layer Deposition, ALD A two stage process with cleaning and purging cycles Clean surface 1.Admit a pulse of H 2 O (forms OH groups) Purge with nitrogen and pump 2.Admit a pulse of metal precursor, Mx y ( e.g. HfCl 4 ) (react with OH to leave metal on surface)

19. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland

20. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland e.g. A(s) = oxygen, B(s) = Hf

21. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Precursor Metal H2O Oxygen Cl Schematic of deposition process

22. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland

23. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland QUB System

24. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland QUB System

25. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland

26. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Inside the QUB system

27. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Gates were traditionally polysilicon High k and polysilicon gate causes problems: 1.surface defects affect Fermi level at interface →high unpredictable Vt. 2.Optical phonon interactions (polarizable dielectric →reduced mobility in channel) Metal gates can solve these problems. Problem areas with high-k dielectrics

28. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland

29. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland

30. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland INTEL transistor characteristics Si/highk/metal gate Saturation drain current is good

31. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Way forward with silicon 1.Create quality interface to dielectric 2.Grow new type of dielectric (High k) 3.Re-engineer transistor to make it work 4.Solve production problems and build

32. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland

33. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland Silicon transistor at 22 nm using silicon (INTEL)

34. School of Electrical and Electronic Engineering Queen’s University Belfast, N.Ireland BICMOS