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Tutorial 7 Derek Wright Monday, March 7 th, 2005.

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1 Tutorial 7 Derek Wright Monday, March 7 th, 2005

2 Silicon MOSFETs Introduction MOS Capacitors MOSFET Structure MOSFET Scaling Gate Dielectrics Gates Junctions and Contacts Alternate MOSFET Structures

3 Introduction MOSFETs are a kind of Field Effect Transistor used in digital ICs –Use a FET because gate voltage uses less current than BJT’s base current BJT was developed first, and FET was theorized, but impractical –Couldn’t make the Field Effect work due to technology constraints at the time

4 MOS Capacitor It’s important to understand how a MOS capacitor works: –Capacitance is a limiting factor in IC performance Mobile charges in gate Mobile charges in channel (between drain and source) Separated by dielectric (gate oxide) = capacitor

5 MOS Capacitor

6 osCap/biasBand10.htmlhttp://jas.eng.buffalo.edu/education/mos/m osCap/biasBand10.html –Shows how a depletion layer forms –The blue charge is what lets current go from source to drain –Other good applets on the site

7 MOS Capacitor

8 Capacitance changes with applied voltage Leads to complicated CMOS simulations Can be exploited in some kinds of VCOs (MOS Varactor)

9 MOSFET Structure We use a MOS capacitor in inversion mode The minority carriers form the “channel” Ions are implanted on either side of the gate to act as sources of carriers Contacts are put on the diffusions to form the source and drain Carriers go from the source to the drain

10 MOSFET Structure

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13 MOSFET Scaling Reducing the size of MOSFETs in ICs has many benefits: –Higher density –Higher speed –Lower Power It also introduces many problems: –Thin gate oxides –Short channel effects –Higher leakage current

14 MOSFET Scaling

15 Gate Dielectrics Gate thickness scales by 1/  with decreasing device dimensions We’re fast approaching the practical limit of how thin SiO 2 gates can get Tunneling can occur causing gate leakage Other problems like hot carriers start to become problematic

16 Gate Dielectrics We can use a thicker dielectric if it has a higher  r These “high-k” dielectrics mean that a given gate voltage will produce a higher E-field Or, a given gate voltage will produce the same E- field with a thicker dielectric layer

17 Gate Dielectrics Problems with a thin gate: –Oxide thickness variation –Impurities from poly gate (particularly B) –Reliability and lifetime problems –High gate current Gate leakage current (V G = 1V): –1pA/cm 2 at 3.5 nm –10A/cm 2 at 1.5 nm

18 Gate Dielectrics

19 Solutions to gate problems: –Add nitrogen to SiO 2 –Use high-k dielectrics High-k dielectrics must meet a number of criteria Must be thermally stable Good electronic properties Microstructural stability Deposition tools and chemistry Process compatibility

20 Gate Dielectrics

21 Gates Poly-silicon is used for gates because: –Adjustable work function through doping –Process compatibility Drawbacks include: –It’s a semiconductor, so it forms a depletion layer which adds to the EOT (effective oxide thickness) –High resistivity Metal is considered as the successor to poly- silicon gates

22 Gates

23 Junctions and Contacts Other resistances must be less than 10% of the channel resistance (R chan ) R chan = [(W/L)  (  ox /t ox (V G – V T )] -1 –L   R chan  (scaling) –   R chan  (new substrates) –  ox   R chan  (high-k dielectrics) –t ox   R chan  (high-k dielectrics and scaling) –V T   (V G – V T )   R chan  (doping)

24 Junctions and Contacts Contacts connect the metal lines to the source/drain/gate of a MOSFET Contact resistance becomes a problem as geometries shrink This can be partially solved by using silicides: –Silicides are metal/silicon alloys with a low resistance

25 Junctions and Contacts Formation of self- aligned silicides (salicides) Metal is deposited over entire wafer Reacts with exposed silicon Unreacted metal is selectively etched off

26 Alternate MOSFET Structures Silicon On Insulator (SOI) wafers eliminate capacitive coupling to the substrate An oxide layer is buried below the transistors, eliminating coupling to the substrate SOI: –reduces leakage –reduces capacitance –higher speed –less susceptible to soft errors

27 Alternate MOSFET Structures New technologies for coming years: –High-k gate dielectrics –Low-k Dielectrics –Metal gate electrodes –SOI –Strained silicon –Vertical multi-gate structures

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29 Thank You! This presentation will be available on the web.


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