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FPGAs for Speed and Flexibility By: Rowland S. Demko Date: Sept’2011.

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Presentation on theme: "FPGAs for Speed and Flexibility By: Rowland S. Demko Date: Sept’2011."— Presentation transcript:

1 FPGAs for Speed and Flexibility By: Rowland S. Demko Date: Sept’2011

2 Say What? High Speed I/O Control FPGA I/O Flexibility Processing Power Communications, Enablers, & Logic Putting It All Together Sophisticated Tools You Can’t Do More for Less

3 High Speed I/O Control CPU with RTOS PCI Bus I/O Module 1 usec FPGA Module with Integrated I/O I/O Lines nanoseconds Approaching 1000x Faster

4 FPGA I/O Flexibility Small FPGAs with Fixed I/O Configurations Front FPGA I/O Configurations Rear FPGA I/O Configurability Supported on: PMC-LX/SX PMC-VLX/VSX XMC-VLX/VSX Supported on: IP-EP20x PMC XMC I/O Types: LVCMOS, LVTTL, LVDS, eLVDS AXM Mezzanine Modules: Digital: AXM-D0x Analog: AXM-Axx

5 Processing Power It’s all about Speed –IP-EP20x @ 125MHz –PMC-LX/SX @ 500MHz –PMC/XMC –VLX/VSX @ 550MHz An then it’s about Simultaneous Parallel Execution –IP-EP20x DCM= None…1 Clock –PMC-LX/SX DCM= 8 –PMC/XMC –VLX/VSX DCM= 12

6 FPGA I/O Overview - 6 - FPGA PMC/XMC-Module What have we learned so far… FPGAs are: Faster Than a Speeding? More Powerful than…? Front I/O Connector Rear I/O Connector BUS Inter face FPGA Device FPGA PMC/XMC-Module Front I/O Connector Rear I/O Connector FPGA Device BUS INTFCE I/O Lines I/O Types: LVCMOS, LVTTL, LVDS, eLVDS I/O Types: TTL, LVDS, RS422, RS485, More

7 Communications, Logic, & Enablers - 7 - FPGA PMC/XMC-Module Front I/O Connector Rear I/O Connector FPGA Device I/O Types: TTL, LVDS, RS422, RS485, More BUS INTFCE I/O Lines Either: PCI, PCIX, PCIe Communications: - Front & Rear I/O - Bus Interface ENABLERS -Soft Core CPU -Operating System -HLL Coded Logic LOGIC -Traditional VHDL -IP Cores

8 Putting it all Together - 8 - FPGA PMC/XMC-Module FPGA Device BUS INTFCE I/O Lines Either: PCI, PCIX, PCIe SDRAM DDR DDR Controller @ 200MHz FFT Image Process@ 500MHz SERDES @ 400MHz Apparatus Control@ 1MHz BUS Intfce & SDRAM Control@ 100MHz Logic Sequence & FIFO Mgmt@ 200MHz Components: -6 DCMs -FFT using DSPs -Logic Sequencer and FIFO Mgmt on Soft Core with C Language Logic

9 Sophisticated Tools Xilinx ISE Foundation – Development For FPGA Logic Debug and Timing Analysis –Xilinx:: Chipscope –Altera:: SignalTap For Modeling and Process Simulation –SimuLink –MathLab

10 You Can’t Do More for Less Faster Logic Processing than any Real Time System Soft-Cores enable powerful Customization of Capabilities and Re-Use One Platform with a Multitude of I/O Options Scalability Designed to Work as Independently as necessary Applications: Control, DSP, Communications, RT Simulation…..You Name it

11 - 11 - For People Getting Anxious Sell FPGAs


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