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Xilinx Advanced Products Division Virtex-4 Overview Version 2.1 March 2005.

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Presentation on theme: "Xilinx Advanced Products Division Virtex-4 Overview Version 2.1 March 2005."— Presentation transcript:

1 Xilinx Advanced Products Division Virtex-4 Overview Version 2.1 March 2005

2 Virtex-4 Overview Module 2 4 th Generation Virtex Built on a Solid Foundation of Success

3 Virtex-4 Overview Module 3 Most Advanced Process Technology Advanced 90-nm process 11-layer copper metallization New Triple-Oxide technology – Enables lower quiescent power consumption Exclusive benefits: – Best cost – Greatest performance – Lowest power – Highest density Enables 2x performance, 2x capacity, ½ power, ½ cost

4 Virtex-4 Overview Module 4 The Most Advanced Parallel I/O Interfacing Capability Universal connectivity – Support for 26 electrical standards – ChipSync™ technology – XCITE DCI Extreme performance – Up to 1 Gbps LVDS – Up to 600 Mbps single-ended Widest set of supported standards – PCI, PCI-X, SFI-4, HSTL, SSTL, LVCMOS, LVTTL…

5 Virtex-4 Overview Module 5 Breakthrough ChipSync™ Technology Pre-Engineered source synchronous logic – Embedded in All I/O Key advantages – Easier design – Higher performance – Resource savings DDR Memory SPI 4.2 Pre-Designed Built-In SSIO Logic IO SERDES Frequency division Serialize/Deserialize Precision Delay Bit/Word Align, DPA IO Clocking I/O clocks Regional clocks Clock-capable I/Os

6 Virtex-4 Overview Module 6 XCITE Digitally Controlled Impedance 3 rd generation DCI – Series, parallel, differential termination – Temperature / voltage compensation Fewer resistors on-board Easier PCB design Termination at source or load Works in conjunction with I/O standards – Examples: HSTL, SSTL, etc. Many Selectable Options

7 Virtex-4 Overview Module 7 SONET Virtex-4 RocketIO™ transceivers – Full-duplex serial transceiver blocks with integrated SERDES and Clock and Data Recovery (CDR) 622 Mbps to >10 Gbps operation – Widest Range of Operation Compatible with Virtex-II Pro Supports chip-to-chip, backplane, chip-to-optics The Most Advanced Serial I/O

8 Virtex-4 Overview Module 8 Support NetworkingNetworking TelecomTelecom ComputingComputing StorageStorage VideoVideo 0.6221. OC-12 OC-48 GbE XAUI 10GbE CEI (OIF) SATA3 SATA2 SATA 1GFC2GFC PCIE HD-SDI SATA GbE 1.45 1.25 2.5 1.53.0 0.622 2.488 3.1251.256.25 1.5 3.0 6.0 1.06 2.12 10GFC 6.0 10.519 SATA2 Rate (Gb/s) CEI (OIF) 4GFC 4.25 8GFC 8.5 Serial I/O Challenges 10.313 11G OBSAI 0.768-1.5 CPRI 0.622 - 2.5 PCIE Gen2 5-6 Virtex-4 Serial I/O Solution

9 Virtex-4 Overview Module 9 Smart RAM Memory Hierarchy Required Memory Capacity

10 Virtex-4 Overview Module 10 Fast and Flexible BRAM Enhanced architecture for higher performance – 500 MHz performance Optional programmable FIFO logic – Saves logic resources – 500 MHz FIFO performance Tunable Block Structure – Scalable and efficient memory utilization – Design compatible with Virtex-II Pro

11 Virtex-4 Overview Module 11 World-Class Clocking High-performance – Up to 500 MHz system clock – Up to 700 MHz source synchronous clock Powerful DCM clocking – Zero-delay buffer – Phase-shift control – Frequency synthesis More resources – Up to 20 DCMs – 32 global clocks

12 Virtex-4 Overview Module 12 Virtex-4 Clock Management: Powerful Solutions Simplified system design – Abundant resources – Application-targeted features – Comprehensive software support Increased system performance – Lower jitter and duty cycle distortion – 500 MHz clock generation and control Clocking features, performance, and flexibility unmatched by any other FPGA

13 Virtex-4 Overview Module 13 Next Generation Optional accumulator / adder – Multiply add, multiply accumulate, or complex multiply Optional pipeline registers – 2x-10x the performance of alternative solutions Cascadable – Combine DSP Slices at Full Speed Highest DSP performance – Up to 500MHz True 18-bit x 18bit MACC Performance

14 Virtex-4 Overview Module 14 Next Generation

15 Virtex-4 Overview Module 15 Achieve DSP Efficiency in Virtex-4 Virtex-4 XtremeDSP – Performance 512 XtremeDSP slices at 500MHz 256 GMACCs/s DSP bandwidth – Power efficiency 5.7mW/100MHz scalable power efficiency 1/7 the power of previous FPGA solutions – Flexibility Operate the XtremeDSP slice in over 40 different modes – Efficiency Highest DSP bandwidth per dollar solution available

16 Virtex-4 Overview Module 16 Integrated PowerPC 405 World’s Most Popular Embedded Processor Architecture High-performance – 680 DMIPS@ 450MHz Low power – 0.29mW/MHz 2 nd generation FPGA with PowerPC 405 – Preserves HW and SW IP – CoreConnect™ bus architecture – Full array of system-level IP New APU interface – Provides direct access from FPGA fabric to PowerPC core – Easy microcontroller and coprocessor support

17 Virtex-4 Overview Module 17 Complete Processor Support EnvironmentGNU

18 Virtex-4 Overview Module 18 New Tri-Mode Ethernet MAC Fully integrated Ethernet Media Access Controller (EMAC) – 10/100/1000 Mbps – 2 or 4 cores per Virtex-4 FX device UNH-Compliant Use with PowerPC or stand-alone Key benefits – Saves up to 4000 logic cells per Ethernet MAC – Implement single-chip 1000 Base-X Ethernet – Great for network management or remote FPGA monitoring ProcessorBlock Phy Interface ClientInterface ClientInterface Statistics Interface

19 Virtex-4 Overview Module 19 Virtex-4 Secure Chip AES Provides Maximum Design Security Bitstreams encrypted with 256-bit AES algorithm Cryptographic keys automatically erased upon malicious tampering Part of standard design flow Among FPGA vendors, only Xilinx meets U.S. Government standards for secure module design

20 Virtex-4 Overview Module 20 Three Virtex-4 Platforms Resource 14-200K LCs Logic Memory DCMs DSP Slices SelectIO RocketIO PowerPC Ethernet MAC LXFXSX 0.9-6Mb 4-12 32-96 240-960 23-55K LCs 2.3-5.7Mb 4-8 128-512 320-640 12-140K LCs 0.6-10Mb 4-20 32-192 240-896 0-24 Channels 1 or 2 Cores 2 or 4 Cores N/A Choose the Platform that Best Fits the Application

21 Virtex-4 Overview Module 21 Virtex-4 LX: Platform for Xtreme Programmable Logic Design Highest logic capacity ever – Up to 200K LCs Widest capacity range – 8 LX devices ranging from 14K-200K LCs

22 Virtex-4 Overview Module 22 Virtex-4 FX: Platform for Xtreme System Design Additional advanced system functions – >10 Gbps RocketIO – PowerPC cores – 10/100/1000 Ethernet MAC cores Rich memory mix – Up to nearly 10Mbits BRAM/FIFO Six FX devices ranging from 12K to 140K LCs

23 Virtex-4 Overview Module 23 Virtex-4 SX: Platform for Xtreme Signal Processing Design DSP Slices Device Cost 512 192 160 128 96 64 32 FX20 FX40 FX60 FX100 LX40 LX80 LX100 LX25 LX15 FX140 LX160 LX200 FX12 LX60 256 GMAC/s: Highest DSP performance in the industry 256 GMAC/s: Highest DSP performance in the industry Lowest DSP cost / performance ratio Lowest DSP cost / performance ratio 256 GMAC/s: Highest DSP performance in the industry 256 GMAC/s: Highest DSP performance in the industry Lowest DSP cost / performance ratio Lowest DSP cost / performance ratio SX25 SX35 SX55

24 Virtex-4 Overview Module 24 Increased Functionality with Dramatic Power Reduction Frequency Power Consumption 50% 130 nm FPGAs Virtex-4 cuts power by 50% Measured 40% lower static power with Triple-Oxide technology 90-nm: 50% lower dynamic power – Lower core voltage + less capacitance Up to 10x lower dynamic power with integrated hard IP – Fewer transistors per function Challenges - Static power (leakage) grows exponentially with process generations - Dynamic power grows with frequency (P = cv 2 f)Challenges - Static power (leakage) grows exponentially with process generations - Dynamic power grows with frequency (P = cv 2 f)

25 Virtex-4 Overview Module 25 Packaging Engineered for Signal & Power Integrity Improved signal integrity & power integrity – Minimizes package & PCB inductances – Reduces noise by 2/3 Designed & verified with extensive simulation No additional costs – Use same number of PCB layers as previous generations Vcco GND Vccint Vccaux The best approach for high pin-count 90nm FPGAs

26 Virtex-4 Overview Module 26 Lowest-Cost, High-Performance FPGA *Based On Logic Cell Count System BOM cost – Integrated features allows elimination of discrete devices and simplified PCB design Packaged Device Cost – 17 Virtex-4 devices to choose from – Optimized feature ratios – Increased device migration within each package Die Cost – Leading edge 90-nm technology – 300mm wafers

27 Virtex-4 Overview Module 27 Unmatched Density Highest Performance Powerful Feature Set Best Cost Structure Thank You !

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