1. Suranaree University Of Technology มทส  2002 Anant Oonsivilai 2002/2/25 Microcomputers and Microprocessors 1 Chapter 4 I/O Port Programming

2.  2002 Anant Oonsivilai 22002/2/25Microcomputers and Microprocessors Outlines 8051 pin functions 4 ports of 8051 Dual role of port 0 for data & address Code assembly language to use ports Use of port 3 for interrupt signals Code 8051 instructions for I/O handling Code bit-manipulation instructions

3.  2002 Anant Oonsivilai 32002/2/25Microcomputers and Microprocessors 8051 Pin Diagram

4.  2002 Anant Oonsivilai 42002/2/25Microcomputers and Microprocessors Clock Generation

5.  2002 Anant Oonsivilai 52002/2/25Microcomputers and Microprocessors Clock Generation

6.  2002 Anant Oonsivilai 62002/2/25Microcomputers and Microprocessors Machine & Clock Cycles

7.  2002 Anant Oonsivilai 72002/2/25Microcomputers and Microprocessors RESET Value of Registers

8.  2002 Anant Oonsivilai 82002/2/25Microcomputers and Microprocessors RESET Circuits

9.  2002 Anant Oonsivilai 92002/2/25Microcomputers and Microprocessors RESET Circuits

10.  2002 Anant Oonsivilai 102002/2/25Microcomputers and Microprocessors Pins for External ROM/RAM EA (external access) V CC : on-chip ROM V CC : on-chip ROM GND: external ROM GND: external ROM PSEN (program store enable) to OE (output enable) pin of ROM to OE (output enable) pin of ROM ALE (address latch enable) to G (enable) pin of 74LS373 to G (enable) pin of 74LS373 See Chapter 14

11.  2002 Anant Oonsivilai 112002/2/25Microcomputers and Microprocessors Port 0: I/O, Open Drain Initially configured as output MOV A,#55H BACK:MOV P0,A BACK:MOV P0,A ACALL DELAY CPL A SJMP BACK

12.  2002 Anant Oonsivilai 122002/2/25Microcomputers and Microprocessors Port 0: I/O, Open Drain

13.  2002 Anant Oonsivilai 132002/2/25Microcomputers and Microprocessors Port 0 as Input: Write all 1s Dual role of port 0 Can be configured as AD0 – AD7 Can be configured as AD0 – AD7 MOVA,#0FFH;A = FF hex MOV P0,A;make P0 an input port ;by writing all 1s to it BACK:MOVA,P0;get data from P0 MOVP1,A;send it to port 1 SJMPBACK;keep doing it

14.  2002 Anant Oonsivilai 142002/2/25Microcomputers and Microprocessors Port 1: I/O, No Pull-up Resistors Initially configured as output MOVA,#55H BACK:MOV P1,A ACALLDELAY CPLA SJMPBACK MOVA,#0FFH;A=FF hex MOVP1,A;make P1 an input port ;by writing all 1s to it MOVA,P1;get data from P1 MOVR7,A;save it in reg R7 ACALLDELAY;wait MOVA,P1;get another data from P1 MOVR6,A;save it in reg R6 ACALLDELAY;wait MOVA,P1;get another data from P1 MOVR5,A;save it in reg R5

15.  2002 Anant Oonsivilai 152002/2/25Microcomputers and Microprocessors Port 2: I/O, No Pull-up Resistors Initially configured as output MOVA,#55H BACK:MOVP2,A ACALLDELAY CPLA SJMPBACK MOVA,#0FFH ;A=FF hex MOVP2,A ;make P2 an input port by ;writing all 1s to it BACK:MOVA,P2 ;get data from P2 MOVP1,A ;send it to Port 1 SJMPBACK ;keep doing that Dual role of port 2: A8-A15

16.  2002 Anant Oonsivilai 162002/2/25Microcomputers and Microprocessors Port 3: I/O, No Pull-up Resistors

17.  2002 Anant Oonsivilai 172002/2/25Microcomputers and Microprocessors Different Ways of Accessing 8 bits BACK:MOVA,#55H MOVP1,A ACALLDELAY MOVA,#0AAH MOVP1,A ACALLDELAY SJMPBACK BACK:MOVP1,#55H ACALLDELAY MOVP1,#0AAH ACALLDELAY SJMPBACK MOV P1,#55H ;P1=01010101 AGAIN:XLR P1,#0FFH ;EX-OR ;P1 with 1111 1111 ACALL DELAY SJMP AGAIN

18.  2002 Anant Oonsivilai 182002/2/25Microcomputers and Microprocessors Single-bit Addressability of Ports BACK:CPLP1.2;complement P1.2 only ACALLDELAY SJMPBACK ;another variation of the above program follows AGAIN:SETBP1.2;change only P1.2=high ACALLDELAY CLRP1.2;change only P1.2=low ACALLDELAY SJMPAGAIN

19.  2002 Anant Oonsivilai 192002/2/25Microcomputers and Microprocessors Single-bit Addressability of Ports

20.  2002 Anant Oonsivilai 202002/2/25Microcomputers and Microprocessors Example 4-2