5 Packing Types of 8051The 8051 family members come in different packages, such as DIP（dual in-line package）,QFP（quad flat package）and LLC（leadless chip carrier）.See Appendix H（Pages ）They all have 40 pins.Figure Pin Diagram
7 Pins of 8051（1/4） Vcc（pin 40）： GND（pin 20）：ground Vcc provides supply voltage to the chip.The voltage source is +5V.GND（pin 20）：groundXTAL1 and XTAL2（pins 19,18）：These 2 pins provide external clock.Way 1：using a quartz crystal oscillator Way 2：using a TTL oscillator Example 4-1 shows the relationship between XTAL and the machine cycle.
8 Pins of 8051（2/4） RST（pin 9）：reset It is an input pin and is active high（normally low）.The high pulse must be high at least 2 machine cycles.It is a power-on reset.Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost.Reset values of some 8051 registers Way 1：Power-on reset circuit Way 2：Power-on reset with debounce
9 Pins of 8051（3/4） /EA（pin 31）：external access There is no on-chip ROM in 8031 andThe /EA pin is connected to GND to indicate the code is stored externally./PSEN ＆ ALE are used for external ROM.For 8051, /EA pin is connected to Vcc.“/” means active low./PSEN（pin 29）：program store enableThis is an output pin and is connected to the OE pin of the ROM.See Chapter 14.
10 Pins of 8051（4/4） ALE（pin 30）：address latch enable I/O port pins It is an output pin and is active high.8051 port 0 provides both address and data.The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch.I/O port pinsThe four ports P0, P1, P2, and P3.Each port uses 8 pins.All I/O pins are bi-directional.
11 Figure 4-2 (a). XTAL Connection to 8051 Using a quartz crystal oscillatorWe can observe the frequency on the XTAL2 pin.C230pFC1XTAL2XTAL1GND
12 Figure 4-2 (b). XTAL Connection to an External Clock Source Using a TTL oscillatorXTAL2 is unconnected.NCEXTERNALOSCILLATORSIGNALXTAL2XTAL1GND
17 Pins of I/O Port The 8051 has four I/O ports Port 0 （pins 32-39）：P0（P0.0～P0.7）Port 1（pins 1-8）：P1（P1.0～P1.7）Port 2（pins 21-28）：P2（P2.0～P2.7）Port 3（pins 10-17）：P3（P3.0～P3.7）Each port has 8 pins.Named P0.X （X=0,1,...,7）, P1.X, P2.X, P3.XEx：P0.0 is the bit 0（LSB）of P0Ex：P0.7 is the bit 7（MSB）of P0These 8 bits form a byte.Each port can be used as input or output (bi-direction).Program is to read data from P0 and then send data to P1
18 Port 1（pins 1-8） Port 1 is denoted by P1. P1.0 ~ P1.7We use P1 as examples to show the operations on ports.P1 as an output port (i.e., write CPU data to the external pin)P1 as an input port (i.e., read pin data into CPU bus)
19 A Pin of Port 1 P0.x 8051 IC Read latch Vcc TB2 Load(L1) P1.X pin D QClk QVccLoad(L1)Read latchRead pinWrite to latchInternal CPU busM1P1.X pinP1.XTB1TB2P0.x8051 IC
20 Hardware Structure of I/O Pin Each pin of I/O portsInternal CPU bus：communicate with CPUA D latch store the value of this pinD latch is controlled by “Write to latch”Write to latch＝1：write data into the D latch2 Tri-state buffer：TB1: controlled by “Read pin”Read pin＝1：really read the data present at the pinTB2: controlled by “Read latch”Read latch＝1：read value from internal latchA transistor M1 gateGate=0: openGate=1: close
21 Figure C-9. Tri-state Buffer OutputInputTri-state control (active high)LLHHLowHighimpedance (open-circuit)HH
22 Writing “1” to Output Pin P1.X D QClk QVccLoad(L1)Read latchRead pinWrite to latchInternal CPU busM1P1.X pinP1.XTB22. output pin is Vcc1. write a 1 to the pin1output 1TB18051 IC
23 Writing “0” to Output Pin P1.X D QClk QVccLoad(L1)Read latchRead pinWrite to latchInternal CPU busM1P1.X pinP1.XTB22. output pin is ground1. write a 0 to the pinoutput 01TB18051 IC
24 Port 1 as Output（Write to a Port） Send data to Port 1：MOV A,#55HBACK: MOV P1,AACALL DELAYCPL ASJMP BACKLet P1 toggle.You can write to P1 directly.
25 Reading Input v.s. Port Latch When reading ports, there are two possibilities：Read the status of the input pin. （from external pin value）MOV A, PXJNB P2.1, TARGET ; jump if P2.1 is not setJB P2.1, TARGET ; jump if P2.1 is setFigures C-11, C-12Read the internal latch of the output port.ANL P1, A ; P1 ← P1 AND AORL P1, A ; P1 ← P1 OR AINC P ; increase P1Figure C-17Table C-6 Read-Modify-Write Instruction (or Table 8-5)See Section 8.3
26 Figure C-11. Reading “High” at Input Pin D QClk QVccLoad(L1)Read latchRead pinWrite to latchInternal CPU busM1P1.X pinP1.X2. MOV A,P1external pin=HighTB2write a 1 to the pin MOV P1,#0FFH11TB13. Read pin=1 Read latch=0 Write to latch=18051 IC
27 Figure C-12. Reading “Low” at Input Pin D QClk QVccLoad(L1)Read latchRead pinWrite to latchInternal CPU busM1P1.X pinP1.X2. MOV A,P1external pin=LowTB2write a 1 to the pinMOV P1,#0FFH1TB13. Read pin=1 Read latch=0 Write to latch=18051 IC
28 Port 1 as Input（Read from Port） In order to make P1 an input, the port must be programmed by writing 1 to all the bit.MOV A,#0FFH ;A= BMOV P1,A ;make P1 an input portBACK: MOV A,P1 ;get data from P0MOV P2,A ;send data to P2SJMP BACKTo be an input port, P0, P1, P2 and P3 have similar methods.Program is to read data from P0 and then send data to P1
29 Table 8-4: Instructions For Reading an Input Port Following are instructions for reading external pins of ports:MnemonicsExamplesDescriptionMOV A,PXMOV A,P2Bring into A the data at P2 pinsJNB PX.Y,..JNB P2.1,TARGETJump if pin P2.1 is lowJB PX.Y,..JB P1.3,TARGETJump if pin P1.3 is highMOV C,PX.YMOV C,P2.4Copy status of pin P2.4 to CY
30 Figure C-17. Reading the Latch 1. Read pin=0 Read latch=1 Write to latch=0 (Assume P1.X=0 initially)D QClk QVccLoad(L1)Read latchRead pinWrite to latchInternal CPU busM1P1.X pinP1.XTB22. CPU compute P1.X OR 14. P1.X=1113. write result to latch Read pin= Read latch= Write to latch=1TB18051 IC
31 Reading Latch Exclusive-or the Port 1： MOV P1,#55H ;P1=01010101 ORL P1,#0F0H ;P1=1. The read latch activates TB2 and bring the data from the Q latch into CPU.Read P1.0=02. CPU performs an operation.This data is ORed with bit 1 of register A. Get 1.3. The latch is modified.D latch of P1.0 has value 1.4. The result is written to the external pin.External pin (pin 1: P1.0) has value 1.
32 Read-modify-write Feature Read-modify-write InstructionsTable C-6This features combines 3 actions in a single instruction：1. CPU reads the latch of the port2. CPU perform the operation3. Modifying the latch4. Writing to the pinNote that 8 pins of P1 work independently.
33 Port 1 as Input（Read from latch） Exclusive-or the Port 1：MOV P1,#55H ;P1=AGAIN: XOR P1,#0FFH ;complementACALL DELAYSJMP AGAINNote that the XOR of 55H and FFH gives AAH.XOR of AAH and FFH gives 55H.The instruction read the data in the latch (not from the pin).The instruction result will put into the latch and the pin.P1 is configured as an output port.
34 Table C-6：Read-Modify-Write Instructions MnemonicsExampleSETB P1.4SETB PX.YCLR P1.3CLR PX.YMOV P1.2,CMOV PX.Y,CDJNZ P1,TARGETDJNZ PX, TARGETINC P1INCCPL P1.2CPLJBC P1.1, TARGETJBC PX.Y, TARGETXRL P1,AXRLORL P1,AORLANL P1,AANLDEC P1DECANL: Latch data AND with A , then save back to latch and write to the external pinORL: OR XRL: XORJBC: jump to TARGET if bit set and clear bitCPL: complementINC: increase DEC: decreaseDJNZ: decrease P1 and jump if P1 not zeroMOV the latch value to carryCLR: clear bit, SETB: set bit
35 Questions How to write the data to a pin？ How to read the data from the pin？Read the value present at the external pin.Why we need to set the pin first？Read the value come from the latch（not from the external pin）.Why the instruction is called read-modify write?
36 Other Pins P1, P2, and P3 have internal pull-up resisters. P1, P2, and P3 are not open drain.P0 has no internal pull-up resistors and does not connects to Vcc inside the 8051.P0 is open drain.Compare the figures of P1.X and P0.X. However, for a programmer, it is the same to program P0, P1, P2 and P3.All the ports upon RESET are configured as output.
37 A Pin of Port 0 P1.x 8051 IC Read latch TB2 P0.X pin Internal CPU bus D QClk QRead latchRead pinWrite to latchInternal CPU busM1P0.X pinP1.XTB1TB2P1.x8051 IC
38 Port 0（pins 32-39） P0 is an open drain. Open drain is a term used for MOS chips in the same way that open collector is used for TTL chips.When P0 is used for simple data I/O we must connect it to external pull-up resistors.Each pin of P0 must be connected externally to a 10K ohm pull-up resistor.With external pull-up resistors connected upon reset, port 0 is configured as an output port.Open drain is a term used for MOS chips in the same way that open collector is used for TTL chips.
39 Figure 4-4. Port 0 with Pull-Up Resistors DS500087518951Vcc10 KPort 0
40 Dual Role of Port 0When connecting an 8051/8031 to an external memory, the 8051 uses ports to send addresses and read instructions.8031 is capable of accessing 64K bytes of external memory.16-bit address：P0 provides both address A0-A7, P2 provides address A8-A15.Also, P0 provides data lines D0-D7.When P0 is used for address/data multiplexing, it is connected to the 74LS373 to latch the address.There is no need for external pull-up resistors as shown in Chapter 14.
41 Figure 14-9 74LS373 8051 ROM 74LS373 ALE P0.0 P0.7 PSEN A0 A7 D0 D7 OEOCEAG8051ROM
42 2. 74373 latches the address and send to ROM Reading ROM (1/2)latches the address and send to ROM1. Send address to ROMD74LS373ALEP0.0P0.7PSENA0A7D0D7P2.0P2.7A8A12OEOCEAG8051ROMAddress
43 Reading ROM (2/2)latches the address and send to ROMD74LS373ALEP0.0P0.7PSENA0A7D0D7P2.0P2.7A8A12OEOCEAG8051ROMAddress3. ROM send the instruction back
44 ALE PinThe ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch.When ALE=0, P0 provides data D0-D7.When ALE=1, P0 provides address A0-A7.The reason is to allow P0 to multiplex address and data.
45 Port 2（pins 21-28）Port 2 does not need any pull-up resistors since it already has pull-up resistors internally.In an 8031-based system, P2 are used to provide address A8-A15.
46 Port 3（pins 10-17）Port 3 does not need any pull-up resistors since it already has pull-up resistors internally.Although port 3 is configured as an output port upon reset, this is not the way it is most commonly used.Port 3 has the additional function of providing signals.Serial communications signal：RxD, TxD（Chapter 10）External interrupt：/INT0, /INT1（Chapter 11）Timer/counter：T0, T1（Chapter 9）External memory accesses in 8031-based system：/WR, /RD（Chapter 14）
47 Table 4-2: Port 3 Alternate Functions 17RDP3.716WRP3.615T1P3.514T0P3.413INT1P3.312INT0P3.211TxDP3.110RxDP3.0PinFunctionP3 Bit
49 I/O Programming To toggle every bit of P1 continuously. 3 ways：Way 1, Way 2, and Way 3.Which one is better？
50 Way 1 Send data to Port 1 through ACC： BACK: MOV A,#55H ;A=01010101B MOV P1,AACALL DELAYMOV A,#0AAH ;A= BSJMP BACK
51 Way 2 Access Port 1 directly： BACK: MOV P1,#55H ;P1=01010101B ACALL DELAYMOV P1,#0AAH ;P1= BSJMP BACK
52 Way 3 Read-modify-write feature： MOV P1,#55H ;P1=01010101B AGAIN: XRL P1,#0FFHACALL DELAYSJMP AGAINThe instruction XRL P1,#0FFH do EX-OR P1 and FFH （That is, to toggle P1.）
53 Bit ManipulationSometimes we need to access only 1 or 2 bits of the port instead of the entire 8 bits.Table 4-3 shows how to name each pin for each I/O port. Example 4-2 See Section 8.1 single-bit instruction programming
54 Table 4-3: Single-Bit Addressability of Ports Port BitP3P2P1P0
55 Example 4-2 Write a program to perform the following. (a) Keep monitoring the P1.2 bit until it becomes high,(b) When P1.2 becomes high, write value 45H to port 0, and(c) Send a high-to-low (H-to-L) pulse to P2.3.Solution:SETB P ;make P1.2 an inputMOV A,#45H ;A=45HAGAIN:JNB P1.2,AGAIN;get out when P.2=1MOV P0,A ;issue A to P0SETB P ;make P2.3 highCLR P ;make P2.3 low for H-to-LNote：1. JNB: jump if no bit（jump if P1.2 = 0 ）2. a H-to-L pulse by the sequence of instructions SETB and CLR.
56 You are able toExplain the purpose of each pin of the 8051 microcontrollerList the 4 ports of the 8051Describe the dual role of port 0 in providing both data and addressCode Assembly language to use the ports for input or outputExplain the use of port 3 for interrupt signalsCode 8051 instructions for I/O handlingCode bit-manipulation instructions in the 8051
57 Homework Chapter 4 Problems：12,28,31,33,34,38,40 Note: Questions of “True and false” need your explanation.Please write and compile the program of Problems 28,38,40.