1. The Intel 8255 Programmable Peripheral Interface chip is used to give the microprocessor (8088) access to programmable input/ output devices. It has three ports for input/ output devices and a control port that contains the control word which programs the 8255 (setting the ports status [I/O] and their modes. 8255 Programmable Peripheral Interface

2. Data bus 8088 D[7:0] A0 A1 RD WR RESET CS Control port PA[7:0] PB[7:0] PC[7:0] A7 A6 A5 A4 A3 A2 IO/M 8255 Programmable Peripheral Interface Control word is sent to the Control Port Chip Select To enable the 8255 according to the Base Address selected Decoding circuit Click here for more Port A [it could be input or output] Port B [it could be input or output] Port C [it could be input or output] Two Address lines to select the port [PA, PB, PC, Control port] they could be any two address lines from A7 – A0 RESET: reset 8255 RD: Read from port(s) WR: write to port(s) 8255

3. A7A6A5A4A3A2A1A0 Base address Port 100111009C HPort A 100111019D HPort B 100111109E HPort C 100111119F HControl port A7 A6 A5 A4 A3 A2 IO/M 8255 Programmable Peripheral Interface The decoding circuit will enable the 8255 chip 6 address lines will be inputted to a NAND gate along with IO/M (input output device/Memory) The remaining 2 address lines will be inputted to the 8255 to select the port [Port A, port B, port C or control port] Example 1 [base address] Assume A7 – A2 are inputted to decoding circuit and A1 - A0 are inputted to 8255 directly to select the port

4. A7A6A5A4A3A2A1A0 Base address Port 0101010054 HPort A 0101011056 HPort B 010111005C HPort C 010111105E HControl port A7 A6 A5 A4 A2 A0 IO/M 8255 Programmable Peripheral Interface Example 2 [base address] Assume A7, A6, A5, A4, A2 and A0 are inputted to the same previous decoding circuit and A3 and A1 are inputted to 8255 directly to select the port