4Analysis ProcedureTruth Table ApproachA B CF1F2= 01
5Analysis Procedure Truth Table Approach A B C F1 F2 0 0 0 0 0 1 1 0 = 0= 11111
6Analysis Procedure Truth Table Approach A B C F1 F2 0 0 0 0 0 1 1 1= 0= 11111
7Analysis Procedure Truth Table Approach A B C F1 F2 0 0 0 0 0 1 1 1= 0= 111
8Analysis Procedure Truth Table Approach A B C F1 F2 0 0 0 0 0 1 1 1= 1= 01111
9Analysis Procedure Truth Table Approach A B C F1 F2 0 0 0 0 0 1 1 1= 1= 011
10Analysis Procedure Truth Table Approach A B C F1 F2 0 0 0 0 0 1 1 1= 1= 011
11Analysis Procedure Truth Table Approach F1=AB'C'+A'BC'+A'B'C+ABC 1= 1111B1ACB1ACF1=AB'C'+A'BC'+A'B'C+ABCF2=AB+AC+BC
12? Design Procedure Given a problem statement: Example: Determine the number of inputs and outputsDerive the truth tableSimplify the Boolean expression for each outputProduce the required circuitExample:Design a circuit to convert a “BCD” code to “Excess 3” code?4-bits0-9 values4-bitsValue+3
13BCD-to-Excess 3 Converter Design ProcedureBCD-to-Excess 3 ConverterC1BAxDC1BAxDA B C Dw x y zx x x xw = A+BC+BDx = B’C+B’D+BC’D’C1BAxDC1BAxDy = C’D’+CDz = D’
14BCD-to-Excess 3 Converter Design ProcedureBCD-to-Excess 3 ConverterA B C Dw x y zx x x xw = A + B(C+D)y = (C+D)’ + CDx = B’(C+D) + B(C+D)’z = D’
15Seven-Segment Decoder abcgedfw x y za b c d e f gx x x x x x x?wxyzabcdefgBCD codey1xwza = w + y + xz + x’z’b = . . .c = . . .d = . . .
16Binary Adder Half Adder Adds 1-bit plus 1-bit Produces Sum and Carry xySCx+ y───C Sx yC S0 00 00 10 11 01 11 0xySC
17Binary Adder Full Adder Adds 1-bit plus 1-bit plus 1-bit Produces Sum and CarryFAxyzSCx+ y+ z───C Sy1xzx y zC S0 00 11 01 1S = xy'z'+x'yz'+x'y'z+xyz = x y zy1xzC = xy + xz + yz
18Binary Adder Full Adder x S S y x y C z z C S = xy'z'+x'yz'+x'y'z+xyz = x y zC = xy + xz + yzxyzSCSCxyz
38Implementation Using Decoders Each output is a mintermAll minterms are producedSum the required mintermsExample: Full AdderS(x, y, z) = ∑(1, 2, 4, 7)C(x, y, z) = ∑(3, 5, 6, 7)I2I1I0Y7Y6Y5Y4 Y3Y2Y1Y0Binary DecoderxyzS C
39Implementation Using Decoders Y7Y6Y5Y4 Y3Y2Y1Y0Binary DecoderxyzS CI2I1I0Y7Y6Y5Y4Y3Y2Y1Y0Binary DecoderxyzS C
40Only one switch should be activated at a time EncodersPut “Information” into codeBinary EncoderExample: 4-to-2 Binary EncoderOnly one switch should be activated at a time123Binary Encodery1y0x1x2x3x3 x2 x1y1 y00 00 11 01 1
60HomeworkMano4-2Obtain the simplified Boolean expressions for output F and G in terms of the input variables in the circuit:
61Homework 4-3 For the circuit shown in the “Quad 2-to-1 MUX”: (a) Write the Boolean functions for the four outputs in terms of the input variables(b) If the circuit is listed in a truth table, how many rows and columns would there be in the truth table?4-5Design a combinational circuit with three inputs, x, y, and z, and three outputs, A, B, and C. When the binary input is 0, 1, 2, or 3, the binary output is one greater than the input. When the binary input is 4, 5, 6, or 7, the binary output is one less than the input.
62Homework4-11Design a 4-bit combinational circuit incrementer. (A circuit that adds one to a 4-bit binary number.) The circuit can be designed using four half-adders.4-13The adder-subtractor circuit has the following values for mode input M and data inputs A and B. In each case, determine the values of the four SUM outputs and the carry C.M A B(a) (b) (c) (d) (e)
63Homework4-27A combinational circuit is specified by the following three Boolean functions:F1(A, B, C) = ∑(2, 4, 7)F2(A, B, C) = ∑(0, 3)F3(A, B, C) = ∑(0, 2, 3, 4, 7)Implement the circuit with a decoder constructed with NAND gates and NAND or AND gates connected to the decoder outputs. Use a block diagram for the decoder. Minimize the number of inputs in the external gates.
64Homework4-28A combinational circuit is defined by the following three Boolean functions:F1 = x’ y’ z’ + x zF2 = x y’ z’ + x’ yF3 = x’ y’ z + x yDesign the circuit with a decoder and external gates.4-31Construct a 16 1 multiplexer with two 8 1 and one 2 1 multiplexers. Use block diagrams.4-32Implement the following Boolean function with a multiplexer: F(A, B, C, D) = ∑(0, 1, 3, 4, 8, 9, 15)
65Homework 4-33 Implement a full adder with two 4 1 multiplexers: 4-35 Implement the following Boolean function with a 4 1 multiplexer and external gates. Connect inputs A and B to the selection lines. The input requirements for the four data lines will be a function of variables C and D. These values are obtained by expressing F as a function of C and D for each of the four cases when AB = 00, 01, 10, and 11. These functions may have to be implemented with external gates.F(A, B, C, D) = ∑(1, 3, 4, 11, 12, 13, 14, 15)