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RF Electronics Engineering Emad Hegazi Professor, ECE Communication Circuits Research Group 1 Spring 2014 Spring.

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Presentation on theme: "RF Electronics Engineering Emad Hegazi Professor, ECE Communication Circuits Research Group 1 Spring 2014 Spring."— Presentation transcript:

1 RF Electronics Engineering Emad Hegazi Professor, ECE Communication Circuits Research Group 1 Spring 2014 Spring 2014 RF Systems and Circuits

2 Resonance Resonance represents the intrinsic rate of energy exchange in a second order system. Friction forces oscillation to cease after a while. Less friction means higher quality system 2 Spring 2014 Spring 2014 RF Systems and Circuits

3 Circuit Analysis 3 Spring 2014 Spring 2014 RF Systems and Circuits If there is no loss define Why?

4 Resonance Inductor and Capacitor exchange energy and loss resistance keeps burning energy By the way, the parallel resistance is simply a model. 4 Spring 2014 Spring 2014 RF Systems and Circuits

5 Resonance R is the ONLY block that draws current from the source at resonance The tank looks like a high impedance to the supply. 5 Spring 2014 Spring 2014 RF Systems and Circuits

6 Quality The ratio of stored current to the source current at resonance R must be large for higher Q. 6 Spring 2014 Spring 2014 RF Systems and Circuits

7 Series Resonance 7 Spring 2014 Spring 2014 RF Systems and Circuits

8 Getting Real 8 Spring 2014 Spring 2014 RF Systems and Circuits If the input source is constant

9 Resonance Inductor and Capacitor exchange energy and loss resistance keeps burning energy The impedance is at minimum when at resonance 9 Spring 2014 Spring 2014 RF Systems and Circuits

10 Resonance Q is the ratio between the voltage on the reactance to the source voltage. 10 Spring 2014 Spring 2014 RF Systems and Circuits

11 Passive Amplification Maximum current flows in the circuit means L & C see maximum voltage at opposite resonance, the circuit amplifies the source voltage by Q 11 Spring 2014 Spring 2014 RF Systems and Circuits QV m -QV m

12 Impedance Conversion 12 Spring 2014 Spring 2014 RF Systems and Circuits

13 Impedance Conversion 13 Spring 2014 Spring 2014 RF Systems and Circuits

14 Outline Friis Formula Merits of LNAs Common Gate LNA Common Source LNA 14 Spring 2014 Spring 2014 RF Systems and Circuits

15 Cascaded Noise Figure In a line-up of receiver stages, use Friis equation G i is the power gain Says that the noise factor ‘F’ is more influenced by earlier stages 15 Spring 2014 Spring 2014 RF Systems and Circuits

16 LNA Merits Gain Low Noise (NF) High Linearity (IIP3) Low Reflection (S11) High reverse isolation (S12) High Stability (K) 16 Spring 2014 Spring 2014 RF Systems and Circuits

17 Maximum Power Transfer 17 Spring 2014 Spring 2014 RF Systems and Circuits

18 Transistor Noise Thermal noise is referred to the input 18 Spring 2014 Spring 2014 RF Systems and Circuits PhysicalCircuit equivalent

19 Common Gate LNA Input impedance is resistive (except for parasitics) Offers good impedance match even at low frequencies 19 Spring 2014 Spring 2014 RF Systems and Circuits

20 Common Gate LNA tunes out transistor and board parasitics. Channel resistance offers good reverse isolation 20 Spring 2014 Spring 2014 RF Systems and Circuits

21 Common Gate LNA At matching condition, Zin = 1/gm 21 Spring 2014 Spring 2014 RF Systems and Circuits

22 Impedance Transformers 22 Spring 2014 Spring 2014 RF Systems and Circuits

23 Impedance Matching Maximum power transfer Minimum noise figure Optimized passives’ transfer functions Minimum reflections 23 Spring 2014 Spring 2014 RF Systems and Circuits

24 Impedance Matching Impedance mismatch is preserved at each port We need a TRANSFORMER 24 Spring 2014 Spring 2014 RF Systems and Circuits

25 Transformer Matching Transformers are bulky and lossy We don’t really need wideband matching in RF transceivers Think of a narrow band equivalent of a transformer 25 Spring 2014 Spring 2014 RF Systems and Circuits

26 Narrow Band Impedance Transformers Load resistance takes only a fraction of the input current Looks like a higher resistance than it really is. Problem: Z in looks reactive 26 Spring 2014 Spring 2014 RF Systems and Circuits

27 the C and Ls tune out and only Rs remains. LNA input is made with higher R to save power 27 Spring 2014 Spring 2014 RF Systems and Circuits Antenna LNA

28 Common Gate LNA: Lowering Power II Narrowband impedance transformer (L Section) allows the LNA to have Zin>50 . Transformer amplifies input signal by: 28 Spring 2014 Spring 2014 RF Systems and Circuits

29 Common Gate LNA: Lowering Power II For same IIP3, V eff has to increase by >1 Current is reduced by the same factor Bias current is given by: 29 Spring 2014 Spring 2014 RF Systems and Circuits gmgm

30 Common Gate LNA: Lowering Power III 30 Spring 2014 Spring 2014 RF Systems and Circuits gmgm

31 Common Source Amplifier Input impedance is purely capacitive Resistive part appears at high frequency No input matching is possible 31 Spring 2014 Spring 2014 RF Systems and Circuits

32 Common Source Amplifier Rg is set to 50  => Input Matching Miller Effect due to C gd => Limited Bandwidth 32 Spring 2014 Spring 2014 RF Systems and Circuits

33 Common Source Amplifier Cascode reduces Miller Effect Resistive Load limits linearity 33 Spring 2014 Spring 2014 RF Systems and Circuits

34 Common Source Amplifier Parallel Resonance at output boasts narrow band gain without impacting linearity R g produces a lot of Noise NF>3 dB 34 Spring 2014 Spring 2014 RF Systems and Circuits

35 Common Source Amplifier Series resonance at input creates a resistive term I in = j  C gs V gs V in =V gs +j  L s (I in +g m V gs ) g m V gs I in 35 Spring 2014 Spring 2014 RF Systems and Circuits

36 Common Source Amplifier Series resonance at input creates a resistive RF, input is still capacitive because L s is very small to give 50  with high  T 36 Spring 2014 Spring 2014 RF Systems and Circuits

37 Common Source Amplifier Gate inductance offers one more degree of freedom to allow matching and series resonance at the same time Valid for 37 Spring 2014 Spring 2014 RF Systems and Circuits

38 Parasitics Ali Niknejad ECE Spring 2014 Spring 2014 RF Systems and Circuits

39 Design Procedure for Common Source LNAs 39 Spring 2014 Spring 2014 RF Systems and Circuits

40 Common Source Amplifier Assume an equivalent resistive load R resonance 40 Spring 2014 Spring 2014 RF Systems and Circuits

41 Common Source Amplifier Noise Figure (F) is given by Decreases with  T Use samll L s Source CoilsTransistor 41 Spring 2014 Spring 2014 RF Systems and Circuits

42 Optimization of CS LNA Input matching condition 42 Spring 2014 Spring 2014 RF Systems and Circuits

43 Optimization of CS LNA  T Increases L g Noise dominates Higher power 43 Spring 2014 Spring 2014 RF Systems and Circuits

44 Another Way to Look at It If Q is input quality factor 44 Spring 2014 Spring 2014 RF Systems and Circuits

45 Another Way to Look at It The input is amplified by Q before it reaches the transistor This reduces linearity 45 Spring 2014 Spring 2014 RF Systems and Circuits

46 Other Losses: Inductor Losses Typically L g losses dominate Adds in series to source noise Independent of FET gain 46 Spring 2014 Spring 2014 RF Systems and Circuits

47 Other Losses: Gate Resistance Gate Resistance creates additional noise (uncorrelated with channel noise) Use inter-digitated layout to reduce gate electrode resistance 47 Spring 2014 Spring 2014 RF Systems and Circuits

48 Other Losses: Gate Induced Noise Due to inversion layer resistance Partly correlated with conventional thermal noise Modeled as a resistance in series with gate 48 Spring 2014 Spring 2014 RF Systems and Circuits

49 Other Losses: Gate Induced Noise The effective Q is lowered by losses Higher Q is achieved through lower C gs Smaller C gs raises rinv and also gate resistance There is an optimum W at each current 49 Spring 2014 Spring 2014 RF Systems and Circuits

50 Other Losses: Substrate Coupling BSIM3V3 models do NOT capture Cgb Gate to bulk capacitance is an additional path for noise 50 Spring 2014 Spring 2014 RF Systems and Circuits

51 Other Losses: Substrate Coupling Hole distribution in the depletion layer are modulated by gate voltage Same effect on electrons in the inversion layer which reflects back on depletion region 51 Spring 2014 Spring 2014 RF Systems and Circuits


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